Sunil Shukla
Sunil Shukla
IBM Research
Email confirmado em us.ibm.com - Página inicial
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FPGA programming for the masses
DF Bacon, R Rabbah, S Shukla
Communications of the ACM 56 (4), 56-63, 2013
1802013
A compiler and runtime for heterogeneous computing
J Auerbach, DF Bacon, I Burcea, P Cheng, SJ Fink, R Rabbah, S Shukla
DAC Design Automation Conference 2012, 271-276, 2012
672012
Single bit error correction implementation in CRC-16 on FPGA
S Shukla, NW Bergmann
Proceedings. 2004 IEEE International Conference on Field-Programmable …, 2004
662004
A scalable multi-TeraOPS deep learning processor core for AI trainina and inference
B Fleischer, S Shukla, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
2018 IEEE Symposium on VLSI Circuits, 35-36, 2018
582018
Quku: A two-level reconfigurable architecture
S Shukla, NW Bergmann, J Becker
IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and …, 2006
522006
Approximate computing: Challenges and opportunities
A Agrawal, J Choi, K Gopalakrishnan, S Gupta, R Nair, J Oh, DA Prener, ...
2016 IEEE International Conference on Rebooting Computing (ICRC), 1-8, 2016
502016
QUKU: A FPGA based flexible coarse grain architecture design paradigm using process networks
S Shukla, NW Bergmann, J Becker
2007 IEEE International Parallel and Distributed Processing Symposium, 1-7, 2007
242007
QUKU: a dual-layer reconfigurable architecture
NW Bergmann, SK Shukla, J Becker
ACM Transactions on Embedded Computing Systems (TECS) 12 (1s), 1-26, 2013
212013
QUKU: A fast run time reconfigurable platform for image edge detection
S Shukla, NW Bergmann, J Becker
International Workshop on Applied Reconfigurable Computing, 93-98, 2006
162006
QUKU: A coarse grained paradigm for FPGAs
S Shukla, NW Bergmann, J Becker
Dagstuhl Seminar Proceedings, 2006
162006
And then there were none: A stall-free real-time garbage collector for reconfigurable hardware
DF Bacon, P Cheng, S Shukla
ACM SIGPLAN Notices 47 (6), 23-34, 2012
122012
And then there were none: a stall-free real-time garbage collector for reconfigurable hardware
DF Bacon, P Cheng, S Shukla
Communications of the ACM 56 (12), 101-109, 2013
92013
Cycle-accurate replay and debugging of running FPGA systems
D Foisy, SK Shukla
US Patent 9,217,774, 2015
82015
A fault modeling technique to test memory BIST algorithms
R Venkatesh, S Kumar, J Philip, S Shukla
Proceedings of the 2002 IEEE International Workshop on Memory Technology …, 2002
82002
A scalable multi-TeraOPS core for AI training and inference
S Shukla, B Fleischer, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
IEEE Solid-State Circuits Letters 1 (12), 217-220, 2018
62018
Parallel real-time garbage collection of multiple heaps in reconfigurable hardware
DF Bacon, P Cheng, S Shukla
ACM SIGPLAN Notices 49 (11), 117-127, 2014
62014
A web server based edge detector implementation in fpga
S Shukla, NW Bergmann, J Becker
2008 IEEE Computer Society Annual Symposium on VLSI, 441-446, 2008
62008
FPGA implementations of ladder diagrams
NW Bergmann, P Waldeck, SK Shukla
Modern Applied Science 7 (3), 64, 2013
52013
Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits
CY Chen, K Gopalakrishnan, J Oh, SK Shukla, V Srinivasan
US Patent 10,120,685, 2018
42018
Best clock frequency search for FPGA-based design
SK Shukla, PS Cheng, R Rabbah
US Patent 8,566,768, 2013
42013
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