Seguir
Giuseppe Tuveri
Giuseppe Tuveri
DIEE - Department of Electrical and Electronic Engineering - Università degli studi di Cagliari
Email confirmado em diee.unica.it
Título
Citado por
Citado por
Ano
ASAM: Automatic architecture synthesis and application mapping
L Jozwiak, M Lindwer, R Corvino, P Meloni, L Micconi, J Madsen, E Diken, ...
Microprocessors and Microsystems 37 (8), 1002-1019, 2013
452013
ASAM: Automatic Architecture Synthesis and Application Mapping
M Jozwiak, L. Lindwer, R Corvino, P Meloni, L Micconi, J Madsen, ...
Digital System Design (DSD), 2012 15th Euromicro Conference on, 216 - 225, 2012
45*2012
System adaptivity and fault-tolerance in NoC-based MPSoCs: the MADNESS project approach
P Meloni, G Tuveri, L Raffo, E Cannella, T Stefanov, O Derin, L Fiorin, ...
Digital System Design (DSD), 2012 15th Euromicro Conference on, 517-524, 2012
392012
Adaptivity support for MPSoCs based on process migration in polyhedral process networks
E Cannella, O Derin, P Meloni, G Tuveri, T Stefanov
VLSI Design 2012, 2, 2012
312012
A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project
O Derin, E Cannella, G Tuveri, P Meloni, T Stefanov, L Fiorin, L Raffo, ...
Microprocessors and Microsystems 37 (6), 515-529, 2013
212013
Enabling fast asip design space exploration: an fpga-based runtime reconfigurable prototyper
P Meloni, S Pomata, G Tuveri, S Secchi, L Raffo, M Lindwer
VLSI Design 2012, 11, 2012
132012
A custom MPSoC architecture with integrated power management for real-time neural signal decoding
N Carta, P Meloni, G Tuveri, D Pani, L Raffo
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 4 (2 …, 2014
122014
A runtime adaptive H. 264 video-decoding MPSoC platform
G Tuveri, S Secchi, P Meloni, L Raffo, E Cannella
Design and Architectures for Signal and Image Processing (DASIP), 2013 …, 2013
62013
Exploiting binary translation for fast ASIP design space exploration on FPGAs
S Pomata, P Meloni, G Tuveri, L Raffo, M Lindwer
Proceedings of the Conference on Design, Automation and Test in Europe, 566-569, 2012
52012
On-the-fly adaptivity for process networks over shared-memory platforms
G Tuveri, P Meloni, F Palumbo, GP Seu, I Loi, F Conti, L Raffo
Microprocessors and Microsystems, 2016
42016
Exploring custom heterogeneous MPSoCs for real-time neural signal decoding
P Meloni, G Tuveri, D Pani, L Raffo, F Palumbo
Design and Architectures for Signal and Image Processing (DASIP), 2015 …, 2015
42015
A Low Overhead Self-adaptation Technique for KPN Applications on NoC-based MPSoCs.
O Derin, PK Ramankutty, P Meloni, G Tuveri
PECCS, 262-269, 2013
42013
MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation
P Meloni, F Palumbo, C Rubattu, G Tuveri, D Pani, L Raffo
Microprocessors and Microsystems, 2016
32016
Real-Time Neural Signal Decoding on Heterogeneous MPSoCs based on VLIW ASIPs
P Meloni, C Rubattu, G Tuveri, D Pani, L Raffo, F Palumbo
Journal of Systems Architecture, 2016
12016
A Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks
P Meloni, G Tuveri, L Raffo, I Loi, F Conti
Proceedings of International Workshop on Manycore Embedded Systems, 25, 2014
12014
A Custom dual-processor System for Real-time Neural Signal Processing
LR Claudio Rubattu, Paolo Meloni, Giuseppe Tuveri
14th IFAC International Conference on. Programmable Devices and Embedded …, 2016
2016
Online process transformation for polyhedral process networks in shared-memory MPSoCs
P Meloni, G Tuveri, L Raffo, I Loi, F Conti
2014 3rd Mediterranean Conference on Embedded Computing (MECO), 92-97, 2014
2014
On-the-fly Adaptivity for Process Networks over Shared-Memory Platforms
Microprocessors and Microsystems, 0
O sistema não pode efectuar a operação agora. Tente mais tarde.
Artigos 1–18