| Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings Great Lakes Symposium on VLSI, 77-82, 1997 | 377 | 1997 |
| Address bus encoding techniques for system-level power optimization L Benini, G De Micheli, E Macii, D Sciuto, C Silvano Proceedings of the conference on Design, automation and test in Europe, 861-867, 1998 | 185 | 1998 |
| ReSPIR: a response surface-based Pareto iterative refinement for application-specific design space exploration G Palermo, C Silvano, V Zaccaria IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2009 | 126 | 2009 |
| A power modeling and estimation framework for VLIW-based embedded systems L Benini, D Bruni, M Chinosi, C Silvano, V Zaccaria, R Zafalon Proc. Int. Workshop on Power And Timing Modeling, Optimization and …, 2001 | 110 | 2001 |
| Multi-objective design space exploration of embedded systems G Palermo, C Silvano, V Zaccaria Journal of Embedded Computing 1 (3), 305-316, 2005 | 103 | 2005 |
| Secure memory accesses on networks-on-chip L Fiorin, G Palermo, S Lukovic, V Catalano, C Silvano IEEE Transactions on Computers 57 (9), 1216-1229, 2008 | 100 | 2008 |
| Power estimation of embedded systems: A hardware/software codesign approach W Fornaciari, P Gubian, D Sciuto, C Silvano IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6 (2), 266-275, 1998 | 97 | 1998 |
| Exploration of distributed shared memory architectures for NoC-based multiprocessors M Monchiero, G Palermo, C Silvano, O Villa Journal of Systems Architecture 53 (10), 719-732, 2007 | 85 | 2007 |
| Multicube: Multi-objective design space exploration of multi-core architectures C Silvano, W Fornaciari, G Palermo, V Zaccaria, F Castro, M Martinez, ... VLSI 2010 Annual Symposium, 47-63, 2011 | 83 | 2011 |
| Power optimization of system-level address buses based on software profiling W Fornaciari, M Polentarutti, D Sciuto, C Silvano Proceedings of the eighth international workshop on Hardware/software …, 2000 | 81 | 2000 |
| An instruction-level energy model for embedded VLIW architectures M Sami, D Sciuto, C Silvano, V Zaccaria IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 77 | 2002 |
| PIRATE: A framework for power/performance exploration of network-on-chip architectures G Palermo, C Silvano International Workshop on Power and Timing Modeling, Optimization and …, 2004 | 76 | 2004 |
| A security monitoring service for NoCs L Fiorin, G Palermo, C Silvano Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware …, 2008 | 67 | 2008 |
| Energy estimation and optimization of embedded VLIW processors based on instruction clustering A Bona, M Sami, D Sciuto, C Silvano, V Zaccaria, R Zafalon Proceedings 2002 Design Automation Conference (IEEE Cat. No. 02CH37324), 886-891, 2002 | 67 | 2002 |
| Power estimation for architectural exploration of HW/SW communication on system-level buses W Fornaciari, D Sciuto, C Silvano Proceedings of the Seventh International Workshop on Hardware/Software …, 1999 | 67 | 1999 |
| An industrial design space exploration framework for supporting run-time resource management on multi-core systems G Mariani, P Avasare, G Vanmeerbeeck, C Ykman-Couvreur, G Palermo, ... Proceedings of the Conference on Design, Automation and Test in Europe, 196-201, 2010 | 63 | 2010 |
| Efficient synchronization for embedded on-chip multiprocessors M Monchiero, G Palermo, C Silvano, O Villa IEEE Transactions on very large scale integration (VLSI) systems 14 (10 …, 2006 | 62 | 2006 |
| A design framework to efficiently explore energy-delay tradeoffs W Fornaciari, D Sciuto, C Silvano, V Zaccaria Proceedings of the ninth international symposium on Hardware/software …, 2001 | 62 | 2001 |
| Instruction-level power estimation for embedded VLIW cores M Sami, D Sciuto, C Silvano, V Zaccaria Proceedings of the eighth international workshop on Hardware/software …, 2000 | 60 | 2000 |
| Linking run-time resource management of embedded multi-core platforms with automated design-time exploration C Ykman-Couvreur, P Avasare, G Mariani, G Palermo, C Silvano, ... IET Computers & Digital Techniques 5 (2), 123-135, 2011 | 56 | 2011 |
Gianluca PalermoAssociate Professor at Politecnico di MilanoEmail confirmado em polimi.it
