| Special session: Cad for hardware security-automation is key to adoption of solutions S Aftabjahani, R Kastner, M Tehranipoor, F Farahmandi, J Oberg, ... 2021 IEEE 39th VLSI Test Symposium (VTS), 1-10, 2021 | 22 | 2021 |
| Hardware and energy efficiency evaluation of nist lightweight cryptography standardization finalists I Elsadek, S Aftabjahani, D Gardner, E MacLean, JR Wallrabenstein, ... 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 133-137, 2022 | 21 | 2022 |
| Analyzing security vulnerabilities induced by high-level synthesis N Pundir, S Aftabjahani, R Cammarota, M Tehranipoor, F Farahmandi ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (3), 1-22, 2022 | 18 | 2022 |
| Functional fault simulation of VHDL gate-level models SA Aftabjahani, Z Navabi 3rd Int’l Annual Conf. of CS of Iran (CSICC 97), 108-118, 1997 | 14 | 1997 |
| Functional fault simulation of VHDL gate level models SA Aftabjahani University of Tehran, 1997 | 14 | 1997 |
| Timing analysis with compact variation-aware standard cell models L Milor, SA Aftabjahani 2009 World Congress on Computer Science and Information Engineering (CSIE …, 2009 | 9* | 2009 |
| Timing analysis with compact variation-aware standard cell models L Milor, SA Aftabjahani Conf. on Design of Circuits and Integrated Systems (DCIS 2007), Sevilla …, 2007 | 9* | 2007 |
| A BIST-based dynamic Obfuscation scheme for resilience against removal and Oracle-guided attacks J Talukdar, S Chen, A Das, S Aftabjahani, P Song, K Chakrabarty 2021 IEEE International Test Conference (ITC), 170-179, 2021 | 7 | 2021 |
| Semiconductor research opportunities: An industry vision and guide S Aftabjahani, A Ameen, B Robert, B Jeff, C Rosario Semiconductor Industry Association: Washington, DC, USA, 2017 | 6 | 2017 |
| Fast variation-aware statistical dynamic timing analysis SA Aftabjahani, L Milor 2009 WRI World Congress on Computer Science and Information Engineering 3 …, 2009 | 6 | 2009 |
| Compact variation-aware standard cell models for timing analysis-Complexity and accuracy Analysis SA Aftabjahani, LS Milor 9th International Symposium on Quality Electronic Design (isqed 2008), 148-151, 2008 | 6 | 2008 |
| IP Security Assurance Standard B Sherman, M Borza, J Valamehr, et al. https://www.design-reuse.com/articles/46877/ip-security-assurance-standard.html, 2019 | 5 | 2019 |
| Energy Efficiency Enhancement of Parallelized Implementation of NIST Lightweight Cryptography Standardization Finalists I Elsadek, S Aftabjahani, D Gardner, E MacLean, JR Wallrabenstein, ... 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 138-141, 2022 | 4 | 2022 |
| Chapter 3: Microlectronics Secuity and Trust-Grand Challenges M Tehranipoor, R Cammarota, S Aftabjahani TAME: Trusted and Assured MicroElectronics Working Group Report, 2019 | 4 | 2019 |
| An Overview of the International Verification and Security Workshop (IVSW) M Abadir, S Aftabjahani 2019 IEEE International Test Conference (ITC), 1-2, 2019 | 4 | 2019 |
| Secure Protection Block and Function Block System and Method S Aftabjahani, A Das US Patent 10,339,979, 2019 | 4 | 2019 |
| An Overview of the International Microprocessor/SoC Test, Security and Validation (MTV) Workshop M Abadir, S Aftabjahani 2019 IEEE International Test Conference (ITC), 1-2, 2019 | 3 | 2019 |
| Security and Privacy Chapter R Cammarota, S Aftabjahani Semiconductor Research Opportunities–An Industry Vision and Guide, 45-51, 2017 | 3 | 2017 |
| Compact variation-aware models for standard cells with interconnect-dominated loads for statistical static timing analysis T Liu, S Aftabjahani, L Milor Proc. Design of Circuits and Integrated Systems, 2013 | 3 | 2013 |
| Research Needs: Trustworthy and Secure Semiconductors and Systems (T3S), Semiconductor Research Corporation, 2019 D Gardner, P Ramrakhani, S Jeloka, P Song, C Vishik, S Aftabjahani, ... | 3 | |
Mark M. TehranipoorIntel Charles E. Young Endowed Chair Professor, ECE, University of FloridaVerified email at ufl.edu
