Markus Weinhardt
Markus Weinhardt
Professor, Osnabrück University of Applied Sciences
Email confirmado em hs-osnabrueck.de - Página inicial
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PACT XPP—A self-reconfigurable data processing architecture
V Baumgarte, G Ehlers, F May, A Nückel, M Vorbach, M Weinhardt
the Journal of Supercomputing 26 (2), 167-184, 2003
4882003
Pipeline vectorization
M Weinhardt, W Luk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001
2422001
Data processing method and device
M Vorbach, J Becker, M Weinhardt, V Baumgarte, F May
US Patent 8,156,284, 2012
2162012
Pipeline vectorization for reconfigurable systems
M Weinhardt, W Luk
Seventh Annual IEEE Symposium on Field-Programmable Custom Computing …, 1999
1671999
Memory access optimisation for reconfigurable systems
M Weinhardt, W Luk
IEE Proceedings-Computers and Digital Techniques 148 (3), 105-112, 2001
1282001
XPP-VC: AC compiler with temporal partitioning for the PACT-XPP architecture
JMP Cardoso, M Weinhardt
International Conference on Field Programmable Logic and Applications, 864-874, 2002
1262002
Data processing system having integrated pipelined array data processor
M Vorbach, J Becker, M Weinhardt, V Baumgarte, F May
US Patent 9,170,812, 2015
1242015
Compiling for reconfigurable computing: A survey
JMP Cardoso, PC Diniz, M Weinhardt
ACM Computing Surveys (CSUR) 42 (4), 1-65, 2010
1222010
Data processing device and method
M Vorbach, M Weinhardt, J Becker
US Patent App. 10/561,135, 2007
1072007
Method for processing data
M Vorbach, A Nückel, F May, M Weinhardt, JMP Cardoso
US Patent 7,657,877, 2010
962010
Method for processing data
F May, A Nuckel, M Vorbach, M Weinhardt, J Cardoso
US Patent App. 09/967,498, 2004
932004
Instruction issue to array of arithmetic cells coupled to load/store cells with associated registers as extended register file
M Vorbach, F May, M Weinhardt
US Patent 9,152,427, 2015
792015
Compilation Methods for Structure-programmable Computers
M Weinhardt
dissertation, 1997
611997
Data processing method and device
M Vorbach, J Becker, M Weinhardt, V Baumgarte, F May
US Patent 8,914,590, 2014
532014
Compilation and Temporal Partitioning for a Coarse-Grain Reconfigurable Architecture
JMP Cardoso, M Weinhardt
New Algorithms, Architectures and Applications for Reconfigurable Computing …, 2005
502005
Integer programming for partitioning in software oriented codesign
M Weinhardt
International Workshop on Field Programmable Logic and Applications, 227-234, 1995
421995
Compilation and pipeline synthesis for reconfigurable architectures
M Weinhardt
Reconfigurable architectures workshop RAW 97, 1997
391997
Using function folding to improve silicon efficiency of reconfigurable arithmetic arrays
M Weinhardt, M Vorbach, V Baumgarte, F May
Proceedings. 2004 IEEE International Conference on Field-Programmable …, 2004
342004
From C programs to the configure-execute model
JMP Cardoso, M Weinhardt
2003 Design, Automation and Test in Europe Conference and Exhibition, 576-581, 2003
332003
Issuing instructions to multiple execution units
M Vorbach, F May, M Weinhardt
US Patent 9,898,297, 2018
322018
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