John Leidel
John Leidel
Tactical Computing Laboratories, Texas Tech University
Email confirmado em - Página inicial
Citado por
Citado por
Virtual address table
JD Leidel, KB Wheeler
US Patent 9,910,787, 2018
Multidimensional contiguous memory allocation
JD Leidel, K Wadleigh
US Patent 9,940,026, 2018
Virtual register file
JD Leidel, GC Rogers
US Patent 10,049,054, 2018
HMC-sim: A simulation framework for hybrid memory cube devices
JD Leidel, Y Chen
Parallel Processing Letters 24 (04), 1442002, 2014
Extreme heterogeneity 2018-productive computational science in the era of extreme heterogeneity: Report for DOE ASCR workshop on extreme heterogeneity
JS Vetter, R Brightwell, M Gokhale, P McCormick, R Ross, J Shalf, ...
Data transfer with a bit vector operation device
JR Isom Crawford, G Kirsch, JD Leidel
US Patent 10,956,439, 2021
Hmc-sim-2.0: A simulation platform for exploring custom memory cube operations
JD Leidel, Y Chen
2016 IEEE International Parallel and Distributed Processing Symposium …, 2016
Translation lookaside buffer in memory
JD Leidel, RC Murphy
US Patent 10,007,435, 2018
Semiconductor device provided with memory chips
R Ohmura, K Sugiura, S Kobayashi
US Patent 6,724,668, 2004
In-memory intelligence
T Finkbeiner, G Hush, T Larsen, P Lea, J Leidel, T Manning
IEEE Micro 37 (4), 30-38, 2017
Systems and methods for selectively controlling multithreaded execution of executable code segments
JD Leidel, KR Wadleigh, J Bolding, T Brewer, DE Walker
US Patent 10,430,190, 2019
Concurrent dynamic memory coalescing on goblincore-64 architecture
X Wang, JD Leidel, Y Chen
Proceedings of the Second International Symposium on Memory Systems, 177-187, 2016
CHOMP: a framework and instruction set for latency tolerant, massively multithreaded processors
JD Leidel, K Wadleigh, J Bolding, T Brewer, D Walker
2012 SC Companion: High Performance Computing, Networking Storage and …, 2012
OpenMP technical report 1 on directives for attached accelerators
E Stotzer, J Beyer, D Das, G Jost, P Raghavendra, J Leidel, A Duran, ...
The OpenMP Architecture Review Board, Tech. Rep, 2012
Apparatuses and methods for memory alignment
JD Leidel
US Patent 10,423,353, 2019
GoblinCore-64: Architectural Specification
JD Leidel, X Wang, Y Chen
Texas Tech University, Tech. Rep., September, 2015
Toward a scalable heterogeneous runtime system for the convey MX architecture
JD Leidel, J Bolding, G Rogers
2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013
MAC: Memory access coalescer for 3D-stacked memory
X Wang, A Tumeo, JD Leidel, J Li, Y Chen
Proceedings of the 48th International Conference on Parallel Processing, 1-10, 2019
xbgas: Toward a risc-v isa extension for global, scalable shared memory
JD Leidel, X Wang, F Conlon, Y Chen, D Donofrio, F Fatollahi-Fard, ...
Proceedings of the Workshop on Memory Centric High Performance Computing, 22-26, 2018
Memory coalescing for hybrid memory cube
X Wang, JD Leidel, Y Chen
Proceedings of the 47th International Conference on Parallel Processing, 1-10, 2018
O sistema não pode efectuar a operação agora. Tente novamente mais tarde.
Artigos 1–20