Instruction generation for hybrid reconfigurable systems R Kastner, A Kaplan, SO Memik, E Bozorgzadeh ACM Transactions on Design Automation of Electronic Systems (TODAES) 7 (4 …, 2002 | 274 | 2002 |
Pattern routing: Use and theory for increasing predictability and avoiding coupling R Kastner, E Bozorgzadeh, M Sarrafzadeh IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 162 | 2002 |
Predictable routing R Kastner, E Bozorgzadeh, M Sarrafzadeh IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE …, 2000 | 162 | 2000 |
Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration S Banerjee, E Bozorgzadeh, N Dutt Proceedings of the 42nd Annual Design Automation Conference, 335-340, 2005 | 144 | 2005 |
Integrating physical constraints in HW-SW partitioning for architectures with partial dynamic reconfiguration S Banerjee, E Bozorgzadeh, ND Dutt IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14 (11 …, 2006 | 114 | 2006 |
RPack: routability-driven packing for cluster-based FPGAs E Bozorgzadeh, S Ogrenci-Memik, M Sarrafzadeh Proceedings of the 2001 Asia and South Pacific Design Automation Conference …, 2001 | 94 | 2001 |
Floorplan-aware automated synthesis of bus-based communication architectures S Pasricha, N Dutt, E Bozorgzadeh, M Ben-Romdhane Proceedings of the 42nd Annual Design Automation Conference, 565-570, 2005 | 93 | 2005 |
A unified theory of timing budget management S Ghiasi, E Bozorgzadeh, PK Huang, R Jafari, M Sarrafzadeh IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 84 | 2006 |
Hardware-assisted detection of malicious software in embedded systems M Rahmatian, H Kooti, IG Harris, E Bozorgzadeh IEEE Embedded Systems Letters 4 (4), 94-97, 2012 | 73 | 2012 |
HARP: hard-wired routing pattern FPGAs S Sivaswamy, G Wang, C Ababei, K Bazargan, R Kastner, E Bozorgzadeh Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field …, 2005 | 69 | 2005 |
Multi-layer floorplanning on a sequence of reconfigurable designs L Singhal, E Bozorgzadeh 2006 International Conference on Field Programmable Logic and Applications, 1-8, 2006 | 64 | 2006 |
Routability-driven packing: Metrics and algorithms for cluster-based FPGAs E Bozorgzadeh, SO Memik, X Yang, M Sarrafzadeh Journal of Circuits, Systems, and Computers 13 (01), 77-100, 2004 | 64 | 2004 |
A super-scheduler for embedded reconfigurable systems SO Memik, E Bozorgzadeh, R Kastner, M Sarrafzadeh IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE …, 2001 | 63 | 2001 |
An exact algorithm for coupling-free routing R Kastner, E Bozorgzadeh, M Sarrafzadeh Proceedings of the 2001 international symposium on Physical design, 10-15, 2001 | 50 | 2001 |
FABSYN: Floorplan-aware bus architecture synthesis S Pasricha, ND Dutt, E Bozorgzadeh, M Ben-Romdhane IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14 (3), 241-253, 2006 | 47 | 2006 |
Single-event-upset (SEU) awareness in FPGA routing S Golshan, E Bozorgzadeh Proceedings of the 44th Annual Design Automation Conference, 330-333, 2007 | 45 | 2007 |
Wirelength estimation based on rent exponents of partitioning and placement X Yang, E Bozorgzadeh, M Sarrafzadeh Proceedings of the 2001 international workshop on System-level interconnect …, 2001 | 44 | 2001 |
Optimal integer delay budgeting on directed acyclic graphs E Bozorgzadeh, S Ghiasi, A Takahashi, M Sarrafzadeh Proceedings of the 40th annual Design Automation Conference, 920-925, 2003 | 38 | 2003 |
Exploiting application data-parallelism on dynamically reconfigurable architectures: Placement and architectural considerations S Banerjee, E Bozorgzadeh, N Dutt IEEE Transactions on very large scale integration (VLSI) systems 17 (2), 234-247, 2009 | 35 | 2009 |
A scheduling algorithm for optimization and early planning in high-level synthesis SO Memik, R Kastner, E Bozorgzadeh, M Sarrafzadeh ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (1 …, 2005 | 35 | 2005 |