Mohammad Gholami
Mohammad Gholami
Faculty Member at University of Mazandaran
Email confirmado em umz.ac.ir - Página inicial
TítuloCitado porAno
A novel low power architecture for DLL-based frequency synthesizers
M Gholami
Circuits, Systems, and Signal Processing 32 (2), 781-801, 2013
192013
Using a memristor crossbar structure to implement a novel adaptive real-time fuzzy modeling algorithm
IEP Afrakoti, SB Shouraki, FM Bayat, M Gholami
Fuzzy Sets and Systems 307, 115-128, 2017
132017
A novel architecture for low voltage-low power DLL-based frequency multipliers
M Gholami, G Ardeshir, H Ghonoodi
IEICE Electronics Express 8 (11), 859-865, 2011
132011
Analysis of DLL jitter due to voltage-controlled delay line
M Gholami, G Ardeshir
Circuits, Systems, and Signal Processing 32 (5), 2119-2135, 2013
122013
Analysis of frequency and amplitude in CMOS differential ring oscillators
H Ghonoodi, H Miar-Naimi, M Gholami
Integration 52, 253-259, 2016
112016
Total jitter of delay-locked loops due to four main jitter sources
M Gholami
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (6 …, 2015
112015
A new fast‐lock, low‐jitter, and all‐digital frequency synthesizer for DVB‐T receivers
M Gholami, H Rahimpour, G Ardeshir, H Miar‐Naimi
International Journal of Circuit Theory and Applications 43 (5), 566-578, 2015
102015
Digital delay locked loop-based frequency synthesiser for Digital Video Broadcasting-Terrestrial receivers
M Gholami, H Rahimpour, G Ardeshir, H MiarNaimi
IET Circuits, Devices & Systems 8 (1), 38-46, 2014
102014
Low voltage and low power DLL-based frequency synthesizer for covering VHF frequency band
M Gholami, M Sharifkhani, M Hashemi
2011 6th International Conference on Design & Technology of Integrated …, 2011
102011
Novel D Latches and D Flip-Flops with Set and Reset Ability in QCA Nanotechnology Using Minimum Cells and Area
MG Roshan, M Gholami
International Journal of Theoretical Physics 57 (10), 3223-3241, 2018
92018
A novel rising Edge Triggered Resettable D flip-flop using five input majority gate
S Zoka, M Gholami
Microprocessors and Microsystems 61, 327-335, 2018
92018
Jitter of delay-locked loops due to pfd
M Gholami, G Ardeshir
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (10 …, 2014
92014
Dual Phase Detector Based on Delay Locked Loop for High Speed Applications.
M Gholami, G Ardeshir
International Journal of Engineering (1025-2495) 27 (4), 2014
8*2014
All digital fast lock DLL-based frequency multiplier
H Rahimpour, M Gholami, H Miar-Naimi, G Ardeshir
Analog Integrated Circuits and Signal Processing 78 (3), 819-826, 2014
82014
New method to synthesize the frequency bands with DLL-based frequency synthesizer
M Gholami, M Gholamidoon, M Hashemi
2011 International Conference on Communications and Signal Processing, 300-304, 2011
72011
Design of Multiplexer-Based D Flip-Flop with Set and Reset Ability in Quantum Dot Cellular Automata Nanotechnology
R Binaei, M Gholami
International Journal of Theoretical Physics 58 (3), 687-699, 2019
62019
Phase Detector with Minimal Blind Zone and Reset Time for GSamples/s DLLs
M Gholami
Circuits, Systems, and Signal Processing 36 (9), 3549-3563, 2017
62017
A Novel Charge Pump with Low Current for Low-Power Delay-Locked Loops
M Estebsari, M Gholami, MJ Ghahramanpour
Circuits, Systems, and Signal Processing 36 (9), 3514-3526, 2017
62017
Counters Designs with Minimum Number of Cells and Area in the Quantum-Dot Cellular Automata Technology
Z Amirzadeh, M Gholami
International Journal of Theoretical Physics 58 (6), 1758-1775, 2019
52019
A wide range delay locked loop for low power and low jitter applications
M Estebsari, M Gholami, MJ Ghahramanpour
International Journal of Circuit Theory and Applications 46 (3), 401-414, 2018
52018
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