Mohammad Gholami
Mohammad Gholami
Faculty Member at University of Mazandaran
Email confirmado em umz.ac.ir - Página inicial
Título
Citado por
Citado por
Ano
A novel low power architecture for DLL-based frequency synthesizers
M Gholami
Circuits, Systems, and Signal Processing 32 (2), 781-801, 2013
212013
Novel D Latches and D Flip-Flops with Set and Reset Ability in QCA Nanotechnology Using Minimum Cells and Area
MG Roshan, M Gholami
International Journal of Theoretical Physics 57 (10), 3223-3241, 2018
172018
A novel rising Edge Triggered Resettable D flip-flop using five input majority gate
S Zoka, M Gholami
Microprocessors and Microsystems 61, 327-335, 2018
152018
Using a memristor crossbar structure to implement a novel adaptive real-time fuzzy modeling algorithm
IEP Afrakoti, SB Shouraki, FM Bayat, M Gholami
Fuzzy Sets and Systems 307, 115-128, 2017
152017
Analysis of frequency and amplitude in CMOS differential ring oscillators
H Ghonoodi, H Miar-Naimi, M Gholami
Integration 52, 253-259, 2016
142016
Jitter of delay-locked loops due to pfd
M Gholami, G Ardeshir
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (10 …, 2014
142014
A novel architecture for low voltage-low power DLL-based frequency multipliers
M Gholami, G Ardeshir, H Ghonoodi
IEICE Electronics Express 8 (11), 859-865, 2011
142011
Phase Detector with Minimal Blind Zone and Reset Time for GSamples/s DLLs
M Gholami
Circuits, Systems, and Signal Processing 36 (9), 3549-3563, 2017
132017
All digital fast lock DLL-based frequency multiplier
H Rahimpour, M Gholami, H Miar-Naimi, G Ardeshir
Analog Integrated Circuits and Signal Processing 78 (3), 819-826, 2014
132014
Design of Multiplexer-Based D Flip-Flop with Set and Reset Ability in Quantum Dot Cellular Automata Nanotechnology
R Binaei, M Gholami
International Journal of Theoretical Physics 58 (3), 687-699, 2019
122019
Total jitter of delay-locked loops due to four main jitter sources
M Gholami
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (6 …, 2015
122015
Digital delay locked loop-based frequency synthesiser for Digital Video Broadcasting-Terrestrial receivers
M Gholami, H Rahimpour, G Ardeshir, H MiarNaimi
IET Circuits, Devices & Systems 8 (1), 38-46, 2014
122014
Analysis of DLL jitter due to voltage-controlled delay line
M Gholami, G Ardeshir
Circuits, Systems, and Signal Processing 32 (5), 2119-2135, 2013
122013
A new fast‐lock, low‐jitter, and all‐digital frequency synthesizer for DVB‐T receivers
M Gholami, H Rahimpour, G Ardeshir, H Miar‐Naimi
International Journal of Circuit Theory and Applications 43 (5), 566-578, 2015
102015
Low voltage and low power DLL-based frequency synthesizer for covering VHF frequency band
M Gholami, M Sharifkhani, M Hashemi
2011 6th International Conference on Design & Technology of Integrated …, 2011
102011
Design of novel D flip-flops with set and reset abilities in quantum-dot cellular automata nanotechnology
R Binaei, M Gholami
Computers & Electrical Engineering 74, 259-272, 2019
92019
Dual Phase Detector Based on Delay Locked Loop for High Speed Applications.
M Gholami, G Ardeshir
International Journal of Engineering (1025-2495) 27 (4), 2014
9*2014
4-Bit serial shift register with reset ability and 4-bit LFSR in QCA technology using minimum number of cells and delay
MG Roshan, M Gholami
Computers & Electrical Engineering 78, 449-462, 2019
82019
Counters Designs with Minimum Number of Cells and Area in the Quantum-Dot Cellular Automata Technology
Z Amirzadeh, M Gholami
International Journal of Theoretical Physics 58 (6), 1758-1775, 2019
82019
Two Novel D-Flip Flops with Level Triggered Reset in Quantum Dot Cellular Automata Technology
M Gholami, S Zoka
International Journal of Engineering 31 (3), 415-421, 2018
82018
O sistema não pode efectuar a operação agora. Tente novamente mais tarde.
Artigos 1–20