| Adaptive body bias aware implementation for ultra-low-voltage designs in 22FDX technology S Höppner, H Eisenreich, D Walter, A Scharfe, A Oefelein, F Schraut, ... IEEE Transactions on Circuits and Systems II: Express Briefs 67 (10), 2159-2163, 2019 | 29 | 2019 |
| How to achieve world-leading energy efficiency using 22FDX with adaptive body biasing on an Arm Cortex-M4 IoT SoC S Höppner, H Eisenreich, D Walter, U Steeb, ASC Dmello, R Sinkwitz, ... ESSDERC 2019-49th European Solid-State Device Research Conference (ESSDERC …, 2019 | 25 | 2019 |
| A 0.55 V 6.3 uW/MHz arm cortex-M4 MCU with adaptive reverse body bias and single rail SRAM D Walter, A Scharfe, A Oefelein, F Schraut, H Bauer, F Csaszar, ... 2020 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-3, 2020 | 12 | 2020 |
| A fast lock-in ultra low-voltage ADPLL clock generator with adaptive body biasing in 22nm FDSOI technology F Schraut, H Eisenreich, S Höppner, C Mayr 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 10 | 2019 |
| Exploration of FPGA architectures for tight coupled accelerators in a 22nm FDSOI technology H Bauer, S Höppner, J Partzsch, D Walter, C Mayr, F Schraut, ... 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and …, 2017 | | 2017 |
