| Dynamically reconfigurable FIR filter architectures with fast reconfiguration M Kumm, K Möller, P Zipf Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013 8th …, 2013 | 51 | 2013 |
| Reconfigurable FIR filter using distributed arithmetic on FPGAs M Kumm, K Möller, P Zipf 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2058-2061, 2013 | 30 | 2013 |
| World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s M Garrido, K Möller, M Kumm IEEE Transactions on Circuits and Systems I: Regular Papers 66 (4), 1507-1516, 2018 | 22 | 2018 |
| Reconfigurable Convolutional Kernels for Neural Networks on FPGAs M Hardieck, M Kumm, K Möller, P Zipf Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019 | 20 | 2019 |
| FIR filter optimization for video processing on FPGAs M Kumm, D Fanghänel, K Möller, P Zipf, U Meyer-Baese EURASIP Journal on Advances in Signal Processing 2013 (1), 1-18, 2013 | 19 | 2013 |
| Reconfigurable Constant Multiplication for FPGAs K Möller, M Kumm, M Kleinlein, P Zipf IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017 | 18 | 2017 |
| ILP-based Modulo Scheduling and Binding for Register Minimization P Sittel, M Kumm, J Oppermann, K Möller, P Zipf, A Koch 2018 28th International Conference on Field Programmable Logic and …, 2018 | 15 | 2018 |
| Partial LUT size analysis in distributed arithmetic FIR Filters on FPGAs M Kumm, K Möller, P Zipf 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2054-2057, 2013 | 12 | 2013 |
| Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits K Möller, M Kumm, M Garrido, P Zipf IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 10 | 2018 |
| Dynamically Reconfigurable Constant Multiplication on FPGAs. K Möller, M Kumm, B Barschtipan, P Zipf MBMV, 159-169, 2014 | 10 | 2014 |
| Pipelined reconfigurable multiplication with constants on FPGAs K Möller, M Kumm, M Kleinlein, P Zipf Field Programmable Logic and Applications (FPL), 2014 24th International …, 2014 | 6 | 2014 |
| High-Level Synthesis for Model-Based Design with Automatic Folding including Combined Common Subcircuits P Sittel, M Kumm, K Möller, M Hardieck, P Zipf 20. Workshop Methoden und Beschreibungssprachen zur Modellierung und …, 2017 | 5 | 2017 |
| Model-based Hardware Design for FPGAs using Folding Transformations based on Subcircuits K Möller, M Kumm, CF Müller, P Zipf arXiv preprint arXiv:1508.06811, 2015 | 5 | 2015 |
| Model-based hardware design based on compatible sets of isomorphic subgraphs P Sittel, K Möller, M Kumm, P Zipf, B Pasca, M Jervis Field Programmable Technology (ICFPT), 2017 International Conference on, 199-202, 2017 | 3 | 2017 |
| Run-time Reconfigurable Constant Multiplication on Field Programmable Gate Arrays K Möller kassel university press GmbH, 2017 | 3 | 2017 |
| FPGA based tunable digital filtering for closed loop RF control in synchrotrons K Möller, M Kumm, P Zipf, K Groß, D Lens, H Klingbeil GSI Scientific Report, 2013 | 3 | 2013 |
| Progress in damping of longitudinal beam oscillations during acceleration D Lens, U Hartel, H Klingbeil, B Zipfel, K Groß, J Adamy, B Reichardt, ... GSI Scientific Report, 2014 | | 2014 |
