João Bispo
João Bispo
FEUP/INESCTEC
Email confirmado em fe.up.pt - Página inicial
TítuloCitado porAno
Regular expression matching for reconfigurable packet inspection
J Bispo, I Sourdis, JMP Cardoso, S Vassiliadis
2006 IEEE International Conference on Field Programmable Technology, 119-126, 2006
2012006
Regular expression matching in reconfigurable hardware
I Sourdis, J Bispo, JMP Cardoso, S Vassiliadis
Journal of Signal Processing Systems 51 (1), 99-121, 2008
972008
Synthesis of regular expressions targeting fpgas: Current status and open issues
J Bispo, I Sourdis, JMP Cardoso, S Vassiliadis
International Workshop on Applied Reconfigurable Computing, 179-190, 2007
842007
The ANTAREX approach to autotuning and adaptivity for energy efficient HPC systems
C Silvano, G Agosta, S Cherubin, D Gadioli, G Palermo, A Bartolini, ...
Proceedings of the ACM International Conference on Computing Frontiers, 288-293, 2016
302016
A model for emotional contagion based on the emotional contagion scale
J Bispo, A Paiva
2009 3rd International Conference on Affective Computing and Intelligent …, 2009
202009
Transparent trace-based binary acceleration for reconfigurable HW/SW systems
J Bispo, N Paulino, JMP Cardoso, JC Ferreira
IEEE Transactions on Industrial Informatics 9 (3), 1625-1634, 2012
182012
The ANTAREX tool flow for monitoring and autotuning energy efficient HPC systems
C Silvano, G Agosta, J Barbosa, A Bartolini, AR Beccari, L Benini, J Bispo, ...
2017 International Conference on Embedded Computer Systems: Architectures …, 2017
162017
From instruction traces to specialized reconfigurable arrays
J Bispo, N Paulino, JMP Cardoso, JC Ferreira
2011 International Conference on Reconfigurable Computing and FPGAs, 386-391, 2011
152011
AutoTuning and Adaptivity appRoach for Energy efficient eXascale HPC systems: the ANTAREX Approach
C Silvano, G Agosta, A Bartolini, AR Beccari, L Benini, J Bispo, R Cmar, ...
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 708-713, 2016
142016
Transparent runtime migration of loop-based traces of processor instructions to reconfigurable processing units
J Bispo, N Paulino, JMP Cardoso, JC Ferreira
International Journal of Reconfigurable Computing 2013, 2013
142013
On identifying and optimizing instruction sequences for dynamic compilation
J Bispo, JMP Cardoso
2010 International Conference on Field-Programmable Technology, 437-440, 2010
142010
On identifying segments of traces for dynamic compilation
J Bispo, JMP Cardoso
2010 International Conference on Field Programmable Logic and Applications …, 2010
142010
Transparent acceleration of program execution using reconfigurable hardware
N Paulino, JC Ferreira, J Bispo, JMP Cardoso
Proceedings of the 2015 Design, Automation & Test in Europe Conference …, 2015
122015
The MATISSE MATLAB compiler
J Bispo, P Pinto, R Nobre, T Carvalho, JMP Cardoso, PC Diniz
2013 11th IEEE International Conference on Industrial Informatics (INDIN …, 2013
122013
A matlab subset to c compiler targeting embedded systems
J Bispo, JMP Cardoso
Software: Practice and Experience 47 (2), 249-272, 2017
92017
C and OpenCL Generation from MATLAB
J Bispo, L Reis, JMP Cardoso
Proceedings of the 30th Annual ACM Symposium on Applied Computing, 1315-1320, 2015
82015
Multi-target C code generation from MATLAB
J Bispo, L Reis, JMP Cardoso
Proceedings of ACM SIGPLAN International Workshop on Libraries, Languages …, 2014
82014
Mapping Runtime-Detected Loops from Microprocessors to Reconfigurable Processing Units
J Bispo
PhD, Instituto Superior Técnico, 2012
82012
Synthesis of regular expressions for FPGAs
J Bispo, JMP Cardoso
International Journal of Electronics 95 (7), 685-704, 2008
82008
Antarex: A dsl-based approach to adaptively optimizing and enforcing extra-functional properties in high performance computing
C Silvano, G Agosta, A Bartolini, AR Beccari, L Benini, L Besnard, J Bispo, ...
2018 21st Euromicro Conference on Digital System Design (DSD), 600-607, 2018
72018
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