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Kan Shi
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Accuracy-performance tradeoffs on an FPGA through overclocking
K Shi, D Boland, GA Constantinides
2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013
332013
Datapath Synthesis for Overclocking: Online Arithmetic for Latency-Accuracy Trade-offs
K Shi, D Boland, E Stott, S Bayliss, GA Constantinides
Proceedings of the The 51st Annual Design Automation Conference (DAC), 1-6, 2014
302014
Towards developing high performance RISC-V processors using agile methodology
Y Xu, Z Yu, D Tang, G Chen, L Chen, L Gou, Y Jin, Q Li, X Li, Z Li, J Lin, ...
2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO …, 2022
292022
Efficient FPGA Implementation of Digit Parallel Online Arithmetic Operators
K Shi, D Boland, GA Constantinides
18*
Delay test for diagnosis of power switches
S Khursheed, K Shi, BM Al-Hashimi, PR Wilson, K Chakrabarty
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 197-206, 2013
152013
ENCORE: Efficient architecture verification framework with FPGA acceleration
K Shi, S Xu, Y Diao, D Boland, Y Bao
Proceedings of the 2023 ACM/SIGDA International Symposium on Field …, 2023
52023
Imprecise datapath design: An overclocking approach
K Shi, D Boland, GA Constantinides
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (2), 1-23, 2015
42015
Overclocking datapath for latency-error tradeoff
K Shi, D Boland, GA Constantinides
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2537-2540, 2013
42013
Evaluation of design trade-offs for adders in approximate datapath
K Shi, GA Constantinides
Proc. HiPEAC Workshop on Approximate Computing, 6, 2015
22015
Functional Verification for Agile Processor Development: A Case for Workflow Integration
YN Xu, ZH Yu, KF Wang, HQ Wang, JW Lin, Y Jin, LJ Zhang, ZF Zhang, ...
Journal of Computer Science and Technology 38 (4), 737-753, 2023
2023
Design of approximate overclocked datapath
K Shi
Imperial College London, 2016
2016
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