Nuno Lourenço
Nuno Lourenço
Instituto de Telecomunicações (IT)
Verified email at ist.utl.pt - Homepage
TitleCited byYear
LAYGEN II—Automatic layout generation of analog integrated circuits
R Martins, N Lourenco, N Horta
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
572013
GENOM-POF: multi-objective evolutionary synthesis of analog ICs with corners validation
N Lourenço, N Horta
Proceedings of the 14th annual conference on Genetic and evolutionary …, 2012
382012
AIDA: Automated analog IC design flow from circuit level to layout
R Martins, N Lourenço, S Rodrigues, J Guilherme, N Horta
Synthesis, Modeling, Analysis and Simulation Methods and Applications to …, 2012
372012
Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction
N Lourenço, R Martins, N Horta
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 …, 2015
282015
Floorplan-aware analog IC sizing and optimization based on topological constraints
N Lourenço, A Canelas, R Póvoa, R Martins, N Horta
Integration, the VLSI journal 48, 183-197, 2015
282015
Laygen ii: automatic analog ics layout generator based on a template approach
R Martins, N Lourenço, N Horta
Proceedings of the 14th annual conference on Genetic and evolutionary …, 2012
27*2012
AIDA: Robust layout-aware synthesis of analog ICs including sizing and layout generation
R Martins, N Lourenço, A Canelas, R Póvoa, N Horta
Synthesis, Modeling, Analysis and Simulation Methods and Applications to …, 2015
222015
AIDA:Layout-aware analog circuit level sizing with in-loop layout generation
N Lourenço, R Martins, A Canelas, R Póvoa, N Horta
Integration, the VLSI Journal, 2016
21*2016
Electromigration-aware analog Router with multilayer multiport terminal structures
R Martins, N Lourenco, A Canelas, N Horta
Integration, the VLSI Journal 47 (4), 532-547, 2014
212014
LAYGEN-automatic layout generation of analog ICs from hierarchical template descriptions
N Lourenço, M Vianello, J Guilherme, N Horta
Research in Microelectronics and Electronics 2006, Ph. D., 213-216, 2006
212006
Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners
R Povoa, N Lourenço, N Horta, R Santos-Tavares, J Goes
Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International …, 2013
192013
Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates
R Martins, N Lourenço, N Horta
Expert Systems with Applications 42 (23), 9137-9151, 2015
162015
State-of-the-art on automatic analog ic sizing
FAE Rocha, RMF Martins, NCC Lourenço, NCG Horta
Electronic Design Automation of Analog ICs combining Gradient Models with …, 2014
132014
Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques
R Povoa, I Bastos, N Lourenço, N Horta
Integration, the VLSI Journal 52, 243-252, 2016
122016
LC-VCO automatic synthesis using multi-objective evolutionary techniques
R Povoa, R Lourenco, N Lourenco, A Canelas, R Martins, N Horta
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, 293-296, 2014
92014
A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis
F Rocha, N Lourenço, R Povoa, R Martins, N Horta
Evolutionary Computation (CEC), 2013 IEEE Congress on, 2781-2788, 2013
82013
Analog circuit design based on robust POFs using an enhanced MOEA with SVM models
N Lourenço, R Martins, M Barros, N Horta
Analog/RF and Mixed-Signal Circuit Systematic Design, 149-167, 2013
82013
Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects
N Lourenço, R Martins, N Horta
Springer, 2017
62017
Current-flow and current-density-aware multi-objective optimization of analog IC placement
R Martins, R Povoa, N Lourenco, N Horta
Integration, the VLSI Journal 55, 295-306, 2016
62016
Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations
A Canelas, R Martins, R Póvoa, N Lourenço, N Horta
Synthesis, Modeling, Analysis and Simulation Methods and Applications to …, 2016
62016
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