Prabhat Mishra

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	Todos	Desde 2016
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Nikil DuttDistinguished Professor, CS, EECS & Cognitive Sciences, University of California, IrvineEmail confirmado em uci.edu
Qin XiaokeUniversity of FloridaEmail confirmado em cise.ufl.edu
Weixun WangUniversity of FloridaEmail confirmado em cise.ufl.edu
Mingsong ChenSoftware Engineering Institute, East China Normal UniversityEmail confirmado em sei.ecnu.edu.cn
Farimah FarahmandiAssistant Professor, University of FloridaEmail confirmado em ufl.edu
Yuanwen HuangVMware, Software EngineerEmail confirmado em ufl.edu
Alex NicolauProfessor of Computer Science, University of CaliforniaEmail confirmado em ics.uci.edu
Sanjay RankaUniversity of FloridaEmail confirmado em cise.ufl.edu
Swarup BhuniaUniversity of FloridaEmail confirmado em ece.ufl.edu
Kanad BasuUniversity of Texas at DallasEmail confirmado em utdallas.edu
Yangdi LyuUniversity of FloridaEmail confirmado em ufl.edu
Kamran RahmaniUniversity of FloridaEmail confirmado em cise.ufl.edu
Mehrdad ReshadiEmail confirmado em reshadi.com
Hadi HajimiriUniversity of FloridaEmail confirmado em cise.ufl.edu
Sandip RayProfessor, Department of Electrical and Computer Engineering, University of Florida at GainesvilleEmail confirmado em ece.ufl.edu
Subodha CharlesPh.D. Candidate, University of FloridaEmail confirmado em ufl.edu
Hiroyuki TomiyamaRitsumeikan UniversityEmail confirmado em fc.ritsumei.ac.jp
Chetan MurthyEmail confirmado em innovium.com
Yier JinAssociate Professor, University of FloridaEmail confirmado em ece.ufl.edu
Xiaolong GuoAssistant Professor, Kansas State UniversityEmail confirmado em ksu.edu

Prabhat Mishra

Professor of CISE, University of Florida, IEEE Fellow, ACM Distinguished Scientist

Email confirmado em ufl.edu - Página inicial

Embedded Systems Energy-Aware Computing Formal Verification Hardware Security and Trust System-on-Chip Validation


Título Ordenar por citações Ordenar por ano Ordenar por título	Citado por Citado por	Ano
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation M Reshadi, P Mishra, N Dutt Proceedings 2003. Design Automation Conference (IEEE Cat. No. 03CH37451 …, 2003	186	2003
LOSSLESS DATA COMPRESSION AND REAL-TIME DECOMPRESSION P Mishra, SW Seong, K Basu, W Wang, X Qin, C Murthy US Patent App. 12/682,808, 2008	142	2008
Functional coverage driven test generation for validation of pipelined processors P Mishra, N Dutt Design, Automation and Test in Europe, 2005. Proceedings, 678-683 Vol. 2, 2005	142*	2005
Processor description languages: applications and methodologies P Mishra, N Dutt Morgan Kaufmann, 2008	135*	2008
Architecture description languages for programmable embedded systems P Mishra, N Dutt Computers and Digital Techniques, IEE Proceedings- 152 (3), 285-297, 2005	97	2005
Dynamic cache reconfiguration and partitioning for energy optimization in real-time multi-core systems W Wang, P Mishra, S Ranka Proceedings of the 48th Design Automation Conference, 948-953, 2011	92	2011
Bitmask-based code compression for embedded systems SW Seong, P Mishra IEEE Transactions on computer-aided design of integrated circuits and …, 2008	82	2008
Graph-based functional test program generation for pipelined processors P Mishra, N Dutt Design, Automation and Test in Europe Conference and Exhibition, 2004 …, 2004	81	2004
Handbook of Energy-Aware and Green Computing, Volume 1 I Ahmad, S Ranka CRC Press, 2012	78	2012
RATS: Restoration-aware trace signal selection for post-silicon validation K Basu, P Mishra IEEE Transactions on Very Large Scale Integration (VLSI) Systems 21 (4), 605-613, 2012	76	2012
Test data compression using efficient bitmask and dictionary selection methods K Basu, P Mishra IEEE transactions on very large scale integration (VLSI) systems 18 (9 …, 2009	75	2009
Functional abstraction driven design space exploration of heterogeneous programmable architectures P Mishra, N Dutt, A Nicolau Proceedings of the 14th international symposium on Systems synthesis, 256-261, 2001	73	2001
Efficient Trace Signal Selection for Post Silicon Validation and Debug K Basu, P Mishra VLSI Design (VLSI Design), 2011 24th International Conference on, 352-357, 2011	65	2011
An efficient retargetable framework for instruction-set simulation M Reshadi, N Bansal, P Mishra, N Dutt First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign …, 2003	64	2003
MERS: statistical test generation for side-channel analysis based Trojan detection Y Huang, S Bhunia, P Mishra Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications …, 2016	63	2016
Pre-silicon security verification and validation: A formal perspective X Guo, RG Dutta, Y Jin, F Farahmandi, P Mishra Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015	56	2015
Efficient trace signal selection using augmentation and ILP techniques K Rahmani, P Mishra, S Ray Fifteenth international symposium on quality electronic design, 148-155, 2014	54	2014
Functional test generation using efficient property clustering and learning techniques M Chen, P Mishra IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010	54	2010
System-wide leakage-aware energy minimization using dynamic voltage scaling and cache reconfiguration in multitasking systems W Wang, P Mishra Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, 1-9, 2011	52	2011
Hardware IP security and trust P Mishra, S Bhunia, M Tehranipoor Springer International Publishing, 2017	51	2017

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