Pipelined parallel FFT architectures via folding transformation M Ayinala, M Brown, KK Parhi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (6 …, 2011 | 203 | 2011 |
Low-complexity Welch power spectral density computation KK Parhi, M Ayinala IEEE Transactions on Circuits and Systems I: Regular Papers 61 (1), 172-182, 2013 | 125 | 2013 |
High-speed parallel architectures for linear feedback shift registers M Ayinala, KK Parhi IEEE Transactions on Signal Processing 59 (9), 4459-4469, 2011 | 83 | 2011 |
An in-place FFT architecture for real-valued signals M Ayinala, Y Lao, KK Parhi IEEE Transactions on Circuits and Systems II: Express Briefs 60 (10), 652-656, 2013 | 75 | 2013 |
FFT Architectures for Real-Valued Signals Based on Radix-and Radix-Algorithms M Ayinala, KK Parhi IEEE Transactions on Circuits and Systems I: Regular Papers 60 (9), 2422-2430, 2013 | 62 | 2013 |
Low complexity algorithm for seizure prediction using Adaboost M Ayinala, KK Parhi 2012 Annual International Conference of the IEEE Engineering in Medicine and …, 2012 | 32 | 2012 |
Efficient parallel VLSI architecture for linear feedback shift registers M Ayinala, KK Parhi 2010 IEEE Workshop On Signal Processing Systems, 52-57, 2010 | 30 | 2010 |
Parallel - pipelined radix-22FFT architecture for real valued signals M Ayinala, KK Parhi 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals …, 2010 | 25 | 2010 |
Parallel pipelined FFT architectures with reduced number of delays M Ayinala, K Parhi Proceedings of the great lakes symposium on VLSI, 63-66, 2012 | 15 | 2012 |
Low-energy architectures for support vector machine computation M Ayinala, KK Parhi 2013 Asilomar Conference on Signals, Systems and Computers, 2167-2171, 2013 | 12 | 2013 |
Parallel pipelined systems for computing the fast fourier transform M Ayinala, MJ Brown, KK Parhi US Patent App. 13/136,927, 2012 | 4 | 2012 |
Low-Power Architectures for Signal Processing and Classification Systems M Ayinala University of Minnesota, 2012 | 1 | 2012 |
High Throughput VLSI Architectures for CRC/BCH Encoders and FFT Computations M Ayinala | 1 | 2010 |
2013 Index IEEE Transactions on Circuits and Systems II: Express Briefs Vol. 60 SH Abdelhalem, JA Abraham, H Adrang, F Aezinia, J Aguado-Ruiz, ... IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS 60 (12), 909, 2013 | | 2013 |
2012 Index IEEE Transactions on Very Large Scale Integration (VLSI) Systems Vol. 20 TM Aamodt, D Abramson, J Adikari, S Aggarwal, M Ahmadi, F Ahmed, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (12), 2357, 2012 | | 2012 |