Error detection technique for a median filter LA Aranda, P Reviriego, JA Maestro IEEE Transactions on Nuclear Science 64 (8), 2219-2226, 2017 | 49 | 2017 |
Analysis of the critical bits of a RISC-V processor implemented in an SRAM-based FPGA for space applications LA Aranda, NJ Wessman, L Santos, A Sánchez-Macián, J Andersson, ... Electronics 9 (1), 175, 2020 | 40 | 2020 |
ACME: A tool to improve configuration memory fault injection in SRAM-based FPGAs LA Aranda, A Sánchez-Macián, JA Maestro IEEE Access 7, 128153-128161, 2019 | 39 | 2019 |
A comparison of dual modular redundancy and concurrent error detection in finite impulse response filters implemented in SRAM-based FPGAs through fault injection LA Aranda, P Reviriego, JA Maestro IEEE Transactions on Circuits and Systems II: Express Briefs 65 (3), 376-380, 2017 | 15 | 2017 |
Fault injection emulation for systems in FPGAs: Tools, techniques and methodology, a tutorial Ó Ruano, F García-Herrero, LA Aranda, A Sánchez-Macián, L Rodriguez, ... Sensors 21 (4), 1392, 2021 | 14 | 2021 |
A fault-tolerant implementation of the median filter LA Aranda, P Reviriego, JA Maestro 2016 16th European Conference on Radiation and Its Effects on Components and …, 2016 | 11 | 2016 |
Reliability analysis of the shyloc ccsds123 ip core for lossless hyperspectral image compression using cots FPGAs LA Aranda, A Sánchez, F Garcia-Herrero, Y Barrios, R Sarmiento, ... Electronics 9 (10), 1681, 2020 | 10 | 2020 |
Toward a fault-tolerant star tracker for small satellite applications LA Aranda, P Reviriego, JA Maestro IEEE Transactions on Aerospace and Electronic Systems 56 (5), 3421-3431, 2020 | 10 | 2020 |
Enhancing instruction TLB resilience to soft errors A Sanchez-Macian, LA Aranda, P Reviriego, V Kiani, JA Maestro IEEE Transactions on Computers 68 (2), 214-224, 2018 | 8 | 2018 |
Radiation hardened digital direct synthesizer with CORDIC for spaceborne applications LA Aranda, F Garcia-Herrero, L Esteban, A Sanchez-Macian, JA Maestro IEEE Access 8, 83167-83176, 2020 | 7 | 2020 |
An algorithmic-based fault detection technique for the 1-d discrete cosine transform LA Aranda, A Sánchez-Macián, JA Maestro IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (5 …, 2020 | 5 | 2020 |
Protection scheme for star tracker images LA Aranda, P Reviriego, RG Toral, JA Maestro IEEE Transactions on Aerospace and Electronic Systems 55 (1), 486-492, 2018 | 5 | 2018 |
Protecting Image Processing Pipelines against Configuration Memory Errors in SRAM-Based FPGAs LA Aranda, P Reviriego, JA Maestro Electronics 7 (11), 322, 2018 | 4 | 2018 |
ACME-2: improving the extraction of essential bits in Xilinx SRAM-based FPGAs LA Aranda, O Ruano, F Garcia-Herrero, JA Maestro IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 1577-1581, 2021 | 3 | 2021 |
Reliability Analysis of ASIC Designs With Xilinx SRAM-Based FPGAs LA Aranda, O Ruano, F Garcia-Herrero, JA Maestro IEEE Access 9, 140676-140685, 2021 | 2 | 2021 |
A methodology to analyze the fault tolerance of demosaicking methods against memory single event functional interrupts (SEFIs) LA Aranda, A Sánchez-Macián, JA Maestro Electronics 9 (10), 1619, 2020 | 2 | 2020 |
Efficient majority-logic Reed-Solomon decoders for single symbol correction F Garcia-Herrero, A Sánchez-Macián, M San-Isidro, LA Aranda, ... IEEE Transactions on Device and Materials Reliability 20 (2), 390-394, 2020 | 1 | 2020 |
Logic Neural Networks for Efficient FPGA Implementation I Ramírez, FJ Garcia-Espinosa, D Concha, LA Aranda IEEE Transactions on Circuits and Systems I: Regular Papers, 2024 | | 2024 |
A real-time demonstrator for image classification using FPGA-based logic neural networks D Concha, FJ Garcia-Espinosa, I Ramirez, LA Aranda Real-time Processing of Image, Depth, and Video Information 2024 13000, 21-26, 2024 | | 2024 |
Reducing false positives due to double adjacent errors in instruction TLBs A Sánchez-Macián, LA Aranda, P Reviriego, JA Maestro Microelectronics Reliability 102, 113494, 2019 | | 2019 |