Reiner Hartenstein
Reiner Hartenstein
University of Kaiserslautern & KIT Karlsruhe
Email confirmado em hartenstein.de - Página inicial
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A decade of reconfigurable computing: a visionary retrospective
R Hartenstein
Proceedings design, automation and test in Europe. Conference and exhibition …, 2001
8782001
Coarse grain reconfigurable architectures
R Hartenstein
Proceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation …, 2001
2852001
Seeking solutions in configurable computing
WH Mangione-Smith, B Hutchings, D Andrews, A DeHon, C Ebeling, ...
Computer 30 (12), 38-43, 1997
2451997
A datapath synthesis system for the reconfigurable datapath architecture
RW Hartenstein, R Kress
Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, 479-484, 1995
1861995
KressArray Xplorer: A new CAD environment to optimize reconfigurable datapath array architectures
R Hartenstein, M Herz, T Hoffmann, U Nageldinger
Proceedings 2000. Design Automation Conference.(IEEE Cat. No. 00CH37106 …, 2000
1212000
Parallelization in co-compilation for configurable accelerators-a host/accelerator partitioning compilation method
J Becker, R Hartenstein, M Herz, U Nageldinger
Proceedings of 1998 Asia and South Pacific Design Automation Conference, 23-33, 1998
1041998
A new FPGA architecture for word-oriented datapaths
RW Hartenstein, R Kress, H Reinig
International Workshop on Field Programmable Logic and Applications, 144-155, 1994
1041994
Configware and morphware going mainstream
J Becker, R Hartenstein
Journal of Systems Architecture 49 (4-6), 127-142, 2003
992003
A novel ASIC design approach based on a new machine paradigm
RW Hartenstein, AG Hirschbiel, M Riedmuller, K Schmidt, M Weber
IEEE Journal of Solid-State Circuits 26 (7), 975-989, 1991
661991
Using the KressArray for reconfigurable computing
RW Hartenstein, M Herz, T Hoffmann, U Nageldinger
Configurable Computing: Technology and Applications 3526, 150-161, 1998
621998
Trends in reconfigurable logic and reconfigurable computing
R Hartenstein
9th International Conference on Electronics, Circuits and Systems 2, 801-808, 2002
602002
A reconfigurable data-driven ALU for Xputers
RW Hartenstein, R Kress, H Reinig
Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines, 139-146, 1994
571994
Reconfigurable systems for sequence alignment and for general dynamic programming
RP Jacobi, M Ayala-Rincón, LGA Carvalho, CH Llanos, RW Hartenstein
Genetics and Molecular Research 4 (3), 543-552, 2005
532005
A General Approach in System Design Integrating Reconfigurable Accelerators
RW Hartenstein, J Becker, M Herz, U Nageldinger
1996 Proceedings. Eighth Annual IEEE International Conference on Innovative …, 1996
531996
Fundamentals of structured hardware design: a design language approach at register transfer level
R Hartenstein
North-Holland, 1977
531977
A threshold logic synthesis tool for RTD circuits
MJ Avedillo, JM Quintana
Euromicro Symposium on Digital System Design, 2004. DSD 2004., 624-627, 2004
502004
Reconfigurable machine for applications in image and video compression
RW Hartenstein, J Becker, R Kress, H Reinig, K Schmidt
Advanced Image and Video Communications and Storage Technologies 2451, 9-20, 1995
501995
A novel paradigm of parallel computation and its use to implement simple high-performance hardware
RW Hartenstein, AG Hirschbiel, K Schmidt, M Weber
Future Generation Computer Systems 7 (2-3), 181-198, 1992
491992
The microprocessor is no more general purpose: Why future reconfigurable platforms will win
R Hartenstein
Proceedings of the Second Annual IEEE International Conference on Innovative …, 1997
471997
Data-procedural Languages for FPL-based Machines
A Ast, J Becker, RW Hartenstein, R Kress, H Reinig, K Schmidt
International Workshop on Field Programmable Logic and Applications, 183-191, 1994
471994
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