Use of mirror elements in the active device synthesis by admittance matrix expansion RA Saad, AM Soliman
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (9), 2726-2735, 2008
108 2008 On the systematic synthesis of CCII‐based floating simulators RA Saad, AM Soliman
International Journal of Circuit Theory and Applications 38 (9), 935-967, 2010
78 2010 Generation, modeling, and analysis of CCII‐based gyrators using the generalized symbolic framework for linear active circuits RA Saad, AM Soliman
International Journal of Circuit Theory and Applications 36 (3), 289-309, 2008
71 2008 A new approach for using the pathological mirror elements in the ideal representation of active devices RA Saad, AM Soliman
International Journal of Circuit Theory and Applications 38 (2), 148-178, 2010
69 2010 The voltage mirror–current mirror pair as a universal element AM Soliman, RA Saad
International Journal of Circuit Theory and Applications 38 (8), 787-795, 2010
65 2010 Two new families of floating FDNR circuits AM Soliman, RA Saad
Journal of Electrical and Computer Engineering 2010, 1-7, 2010
32 2010 Clock-jitter-tolerant wideband receivers: An optimized multichannel filter-bank approach S Hoyos, S Pentakota, Z Yu, ESA Ghany, X Chen, R Saad, S Palermo, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (2), 253-263, 2010
25 2010 Sensitivity Analysis of Continuous-Time ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers R Saad, DL Aristizabal-Ramirez, S Hoyos
IEEE Transactions on Circuits and Systems I: Regular Papers 59 (9), 1894-1905, 2012
18 2012 On the introduction of new floating current conveyors AM Soliman, RA Saad
Journal of Circuits, Systems, and Computers 18 (06), 1005-1016, 2009
11 2009 Abuo al Atta K, Ali N. Radical cure of pilonidal sinus by a transposition rhomboid flap A Azab, M Kamal, R Saad
Br J Surg 71, 154-155, 1984
8 1984 Analysis and Modeling of Clock-Jitter Effects in Delta-Sigma Modulators R Saad, S Hoyos, S Palermo
MATLAB - A Fundamental Tool for Scientific Computing and Engineering …, 2012
6 2012 Sensitivity analysis of pulse-width jitter induced noise in continuous-time delta-sigma modulators to out-of-band blockers in wireless receivers R Saad, S Hoyos
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1636-1639, 2011
6 2011 Generation of second generation current conveyor (CCII) family from inverting second generation current conveyor (ICCII) family AM Soliman, RA Saad
International journal of electronics 97 (4), 405-414, 2010
5 2010 Jitter cancellation method for continuous-time sigma-delta modulators R Ahmed, S Hoyos, J Silva-Martinez
US Patent 8,164,500, 2012
4 2012 Feedforward spectral shaping technique for clock-jitter induced errors in digital-to-analogue converters R Saad, S Hoyos
Electronics letters 47 (3), 171-172, 2011
3 2011 Sensitivity of single-bit continuous-time ΔΣ analogue-to-digital converters to out-of-band blockers R Saad, S Hoyos
Electronics letters 46 (12), 826-828, 2010
3 2010 MATLAB - A Fundamental Tool for Scientific Computing and Engineering Applications SP R Saad, S Hoyos
InTech - Open Access Publisher 1, 393-422, 2012
1 * 2012 Reduced area discrete-time down-sampling filter embedded with windowed integration samplers K Raviprakash, R Saad, S Hoyos
Electronics letters 46 (12), 828-830, 2010
1 2010 Synthesis, Analysis, and Modeling of Analog Active Circuits: Generalized Symbolic Framework: Theory and Applications R Saad, A Soliman
Synthesis, Analysis, and Modeling of Analog Active Circuits: Generalized …, 2012
2012 Generalized Symbolic Framework for Synthesis, Analysis, and Modeling of Analog Active Circuits: Theory and Applications RA Saad, AM Soliman