High throughput multitransform and multiparallelism IP for H. 264/AVC video compression standard L Agostini, R Porto, J Guntzel, IS Silva, S Bampi 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-5422, 2006 | 31 | 2006 |
Design and FPGA prototyping of a H. 264/AVC main profile decoder for HDTV LV Agostini, AP Azevedo Filho, WT Staehler, VS Rosa, B Zatt, ACM Pinto, ... Journal of the Brazilian Computer Society 13, 25-36, 2007 | 25 | 2007 |
Power-efficient approximate SAD architecture with LOA imprecise adders R Porto, L Agostini, B Zatt, N Roma, M Porto 2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS), 65-68, 2019 | 23 | 2019 |
Energy-efficient motion estimation with approximate arithmetic R Porto, L Agostini, B Zatt, M Porto, N Roma, L Sousa 2017 IEEE 19th International Workshop on Multimedia Signal Processing (MMSP …, 2017 | 22 | 2017 |
A FPGA based design of a multiplierless and fully pipelined JPEG compressor LV Agostini, RC Porto, S Bampi, IS Silva 8th Euromicro Conference on Digital System Design (DSD'05), 210-213, 2005 | 18 | 2005 |
Design space exploration on the H. 264 4/spl times/4 Hadamard transform MS Porto, TL Da Silva, REC Porto, LV Agostini, IV da Silva, S Bampi 2005 NORCHIP, 188-191, 2005 | 17 | 2005 |
High throughput FPGA based architecture for H. 264/AVC inverse transforms and quantization L Agostini, M Porto, JL Guntzel, R Porto, S Bampi 2006 49th IEEE International Midwest Symposium on Circuits and Systems 1 …, 2006 | 16 | 2006 |
Hardware design of the H. 264/AVC variable block size motion estimation for real-time 1080HD video encoding R Porto, L Agostini, S Bampi 2009 IEEE Computer Society Annual Symposium on VLSI, 115-120, 2009 | 15 | 2009 |
Homogeneity and distortion-based intra mode decision architecture for H. 264/AVC G Corrêa, C Diniz, S Bampi, D Palomino, R Porto, L Agostini 2010 17th IEEE International Conference on Electronics, Circuits and Systems …, 2010 | 14 | 2010 |
Project space exploration on the 2-D DCT architecture of a JPEG compressor directed to FPGA implementation REC Porto, LV Agostini Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004 | 12 | 2004 |
High throughput architecture for H. 264/AVC forward transforms block L Agostini, R Porto, S Bampi, L Rosa, J Güntzel, IS Silva Proceedings of the 16th ACM Great Lakes symposium on VLSI, 320-323, 2006 | 10 | 2006 |
High throughput architecture for forward transforms module of H. 264/AVC video coding standard R Porto, M Porto, S Bampi, L Agostini 2007 14th IEEE International Conference on Electronics, Circuits and Systems …, 2007 | 8 | 2007 |
Fast and energy-efficient approximate motion estimation architecture for real-time 4 K UHD processing R Porto, M Perleberg, V Afonso, B Zatt, N Roma, L Agostini, M Porto Journal of Real-Time Image Processing 18, 723-737, 2021 | 7 | 2021 |
FPGA prototyping strategy for a H. 264/AVC video decoder VS Rosa, WT Staehler, A Azevedo, B Zatt, RE Porto, LV Agostini, S Bampi, ... 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP'07 …, 2007 | 7 | 2007 |
Desenvolvimento arquitetural para estimação de movimento de blocos de tamanhos variáveis segundo padrão H. 264/AVC de compressão de vídeo digital REC Porto | 6 | 2008 |
An integer 2-D DCT architecture for H. 264/AVC video coding standard REC Porto, MS Porto, TL da Silva, LZP da Rosa, JLA Guntzel, LV Agostini XX SIM-South Symposium on Microeletronics, 2005 | 4 | 2005 |
UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders R Porto, M Correa, J Goebel, B Zatt, N Roma, L Agostini, M Porto Journal of Real-Time Image Processing 17, 1685-1701, 2020 | 3 | 2020 |
Experimentos com somadores rápidos para uso na DCT 2-D R Porto, L Agostini IX WORKSHOP IBERCHIP, 2004 | 3 | 2004 |
Forward and inverse 2-D DCT architectures targeting HDTV for H. 264/AVC video compression standard L Agostini, R Porto, M Porto, T Silva, L Rosa, J Güntzel, I Silva, S Bampi Latin American applied research 37 (1), 11-16, 2007 | 2 | 2007 |
Impactos do Uso de Diferentes Arquiteturas de Somadores em FPGAS ALTERA MS Porto, AMC Silva, REC Porto, JLA Güntzel, LV Agostini XI IBERCHIP Workshop, 2005 | 2 | 2005 |