| Piranha: a scalable architecture based on single-chip multiprocessing LA Barroso, K Gharachorloo, R McNamara, A Nowatzyk, S Qadeer, ... ACM SIGARCH Computer Architecture News 28 (2), 282-293, 2000 | 767 | 2000 |
| Controlling power consumption of at least one computer system KI Farkas, G Janakiraman, R Stets, CD Patel, CC Wanner US Patent 7,272,732, 2007 | 342 | 2007 |
| Cashmere-2L: Software coherent shared memory on a clustered remote-write network R Stets, S Dwarkadas, N Hardavellas, G Hunt, L Kontothanassis, ... ACM SIGOPS Operating Systems Review 31 (5), 170-183, 1997 | 246 | 1997 |
| CSM-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network R Stets, H Dwarkadas, N Hardavellas, G Hunt, L Kontothanassisy, ... In Proc. of the Sixteenth SOSP, 1997 | 246* | 1997 |
| VM-based shared memory on low-latency, remote-memory-access networks L Kontothanassis, G Hunt, R Stets, N Hardavellas, M Cierniak, ... ACM SIGARCH Computer Architecture News 25 (2), 157-169, 1997 | 120 | 1997 |
| Power-aware adaptation in a data center RN Mayo, P Ranganathan, RJ Stets Jr, DA Wallach US Patent 7,546,475, 2009 | 103 | 2009 |
| Cache coherence protocol engine system and method for processing memory transaction in distinct address subsets during interleaved time periods in a multiprocessor system K Gharachorloo, LA Barroso, MK Ravishankar, RJ Stets Jr, A Nowatzyk US Patent 6,622,217, 2003 | 102 | 2003 |
| System for handling coherence protocol races in a scalable shared memory system based on chip multiprocessing LA Barroso, K Gharachorloo, A Nowatzyk, RJ Stets, MK Ravishankar US Patent 6,636,949, 2003 | 100 | 2003 |
| Cashmere-VLM: Remote memory paging for software distributed shared memory S Dwarkadas, N Hardavellas, L Kontothanassis, R Nikhil, R Stets Parallel Processing, 1999. 13th International and 10th Symposium on Parallel …, 1999 | 100 | 1999 |
| Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants LA Barroso, K Gharachorloo, A Nowatzyk, MK Ravishankar, RJ Stets Jr US Patent 6,675,265, 2004 | 97 | 2004 |
| Power-aware adaptation in an information server RN Mayo, P Ranganathan, RJ Stets Jr, DA Wallach US Patent 7,003,640, 2006 | 88 | 2006 |
| System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system K Gharachorloo, LA Barroso, RJ Stets Jr, MK Ravishankar, A Nowatzyk US Patent 6,697,919, 2004 | 83 | 2004 |
| Scalable multiprocessor system and cache coherence method K Gharachorloo, LA Barroso, MK Ravishankar, RJ Stets Jr, DJ Scales US Patent 6,751,710, 2004 | 76 | 2004 |
| Advertisement approval GJ Badros, RJ Stets, L Zhang US Patent 8,423,413, 2013 | 58 | 2013 |
| Method and system for detecting and resolving virtual address synonyms in a two-level cache hierarchy LA Barroso, K Gharachorloo, A Nowatzyk, RJ Stets Jr, MK Ravishankar US Patent 6,751,720, 2004 | 56 | 2004 |
| Comparative evaluation of fine-and coarse-grain approaches for software distributed shared memory S Dwarkadas, K Gharachorloo, L Kontothanassis, DJ Scales, ML Scott, ... High-Performance Computer Architecture, 1999. Proceedings. Fifth …, 1999 | 50 | 1999 |
| Scalable multiprocessor system and cache coherence method incorporating invalid-to-dirty requests K Gharachorloo, LA Barroso, MK Ravishankar, RJ Stets, DJ Scales US Patent 6,640,287, 2003 | 49 | 2003 |
| Operating system application programming interfaces and methods of using operating systems GC Hunt, G Cermak, RJ Stets Jr US Patent 7,334,235, 2008 | 48 | 2008 |
| The effect of network total order, broadcast, and remote-write capability on network-based shared memory computing R Stets, S Dwarkadas, L Kontothanassis, U Rencuzogullari, ML Scott High-Performance Computer Architecture, 2000. HPCA-6. Proceedings. Sixth …, 2000 | 47 | 2000 |
| Scalable multiprocessor system and cache coherence method implementing store-conditional memory transactions while an associated directory entry is encoded as a coarse bit vector K Gharachorloo, LA Barroso, MK Ravishankar, RJ Stets, DJ Scales US Patent 6,748,498, 2004 | 35 | 2004 |
