Ram Rangan
Ram Rangan
Verified email at nvidia.com
Title
Cited by
Cited by
Year
SWIFT: Software implemented fault tolerance
GA Reis, J Chang, N Vachharajani, R Rangan, DI August
International Symposium on Code Generation and Optimization, 243-254, 2005
9072005
Automatic thread extraction with decoupled software pipelining
G Ottoni, R Rangan, A Stoler, DI August
38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'05 …, 2005
3772005
RIFLE: An architectural framework for user-centric information-flow security
N Vachharajani, MJ Bridges, J Chang, R Rangan, G Ottoni, JA Blome, ...
37th International Symposium on Microarchitecture (MICRO-37'04), 243-254, 2004
3572004
Computing architectural vulnerability factors for address-based structures
A Biswas, P Racunas, R Cheveresan, J Emer, SS Mukherjee, R Rangan
32nd International Symposium on Computer Architecture (ISCA'05), 532-543, 2005
2772005
Design and evaluation of hybrid fault-detection systems
GA Reis, J Chang, N Vachharajani, R Rangan, DI August, SS Mukherjee
ACM SIGARCH Computer Architecture News 33 (2), 148-159, 2005
2262005
Decoupled software pipelining with the synchronization array
R Rangan, N Vachharajani, M Vachharajani, DI August
Proceedings. 13th International Conference on Parallel Architecture and …, 2004
2062004
Speculative decoupled software pipelining
N Vachharajani, R Rangan, E Raman, MJ Bridges, G Ottoni, DI August
16th International Conference on Parallel Architecture and Compilation …, 2007
1772007
Software-controlled fault tolerance
GA Reis, J Chang, N Vachharajani, R Rangan, DI August, SS Mukherjee
ACM Transactions on Architecture and Code Optimization (TACO) 2 (4), 366-396, 2005
1752005
Spice: speculative parallel iteration chunk execution
E Raman, N Va hharajani, R Rangan, DI August
Proceedings of the 6th annual IEEE/ACM international symposium on Code …, 2008
452008
Hardware-modulated parallelism in chip multiprocessors
J Chen, P Juang, K Ko, G Contreras, D Penry, R Rangan, A Stoler, ...
ACM SIGARCH Computer Architecture News 33 (4), 54-63, 2005
422005
Support for high-frequency streaming in CMPs
R Rangan, N Vachharajani, A Stoler, G Ottoni, DI August, GZN Cai
2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006
402006
From sequential programs to concurrent threads
G Ottoni, R Rangan, A Stoler, MJ Bridges, DI August
IEEE Computer Architecture Letters 5 (1), 6-9, 2006
382006
Performance scalability of decoupled software pipelining
R Rangan, N Vachharajani, G Ottoni, DI August
ACM Transactions on Architecture and Code Optimization (TACO) 5 (2), 1-25, 2008
372008
Using hardware interrupts to drive dynamic binary code recompilation
MW Stephenson, R Rangan
US Patent 8,453,129, 2013
172013
Predication supporting code generation by indicating path associations of symmetrically placed write instructions
R Rangan, MW Stephenson, L Zhang
US Patent 9,262,140, 2016
142016
Pipelined multithreading transformations and support mechanisms
R Rangan
Dissertation Abstracts International 68 (03), 2007
102007
Zeroploit: Exploiting Zero Valued Operands in Interactive Gaming Applications
R Rangan, M Stephenson, A Ukarande, S Murthy, V Agarwal, ...
ACM Transactions on Architecture and Code Optimization (TACO) 17 (3), 26, 2020
62020
Techniques for predicated execution in an out-of-order processor
R Rangan, WE Speight, MW Stephenson, L Zhang
US Patent 9,946,550, 2018
62018
Predication support in an out-of-order processor by selectively executing ambiguously renamed write operations
R Rangan, MW Stephenson, L Zhang
US Patent 7,886,132, 2011
62011
Statistically regulating program behavior via mainstream computing
MW Stephenson, R Rangan, E Yashchin, E Van Hensbergen
Proceedings of the 8th annual IEEE/ACM international symposium on Code …, 2010
52010
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Articles 1–20