Juan P. Oliver
Juan P. Oliver
Email confirmado em fing.edu.uy
Citado por
Citado por
Lab at home: Hardware kits for a digital design lab
JP Oliver, F Haim
IEEE Transactions on education 52 (1), 46-51, 2008
Clock gating and clock enable for FPGA power reduction
JP Oliver, J Curto, D Bouvier, M Ramos, E Boemo
2012 VIII Southern Conference on Programmable Logic, 1-5, 2012
Power estimations vs. power measurements in Cyclone III devices
JP Oliver, E Boemo
2011 VII southern conference on Programmable Logic (SPL), 87-90, 2011
Particle filter slam on fpga: A case study on robot@ factory competition
BG Sileshi, J Oliver, R Toledo, J Gonçalves, P Costa
Robot 2015: Second Iberian Robotics Conference, 411-423, 2016
Wireless EEG system achieving high throughput and reduced energy consumption through lossless and near-lossless compression
GD y Alvarez, F Favaro, F Lecumberry, Á Martín, JP Oliver, J Oreggioni, ...
IEEE transactions on biomedical circuits and systems 12 (1), 231-241, 2018
Hardware lab at home possible with ultra low cost boards [logic design course]
JP Oliver, F Haim, S Fernandez, J Rodríguez, P Rolando
2005 IEEE International Conference on Microelectronic Systems Education (MSE …, 2005
Wearable EEG via lossless compression
G Dufort, F Favaro, F Lecumberry, Á Martín, JP Oliver, J Oreggioni, ...
2016 38th annual international conference of the IEEE engineering in …, 2016
Tracking the pipelining-power rule along the FPGA technical literature
E Boemo, JP Oliver, G Caffarena
Proceedings of the 10th FPGAworld Conference, 1-5, 2013
Power estimations vs. power measurements in Spartan-6 devices
JP Oliver, JP Acle, E Boemo
2014 IX southern conference on Programmable Logic (SPL), 1-5, 2014
Diseño digital utilizando lógica programable: aplicaciones a la enseñanza
JP Oliver
Self-reconfigurable constant multiplier for fpga
J Hormigo, G Caffarena, JP Oliver, E Boemo
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 6 (3), 1-17, 2013
Simenerg: the design of autonomous systems
C Briozzo, G Casaravilla, R Chaer, JP Oliver
UR. FING, 1996
Understanding the Performance of Elementary NLA Kernels in FPGAs
F Favaro, JP Oliver, E Dufrechou, P Ezzatti
2020 IEEE International Parallel and Distributed Processing Symposium …, 2020
Exploring fpga Optimizations to Compute Sparse Numerical Linear Algebra Kernels.
F Favaro, E Dufrechou, P Ezzatti, JP Oliver
ARC, 258-268, 2020
A 64-channel wireless EEG recording system for wearable applications
M Causa, F La Paz, S Radi, JP Oliver, L Steinfeld, J Oreggioni
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018
A low cost system for self measurements of power consumption in field programmable gate arrays
JP Oliver, F Veirano, D Bouvier, E Boemo
Journal of Low Power Electronics 13 (1), 1-9, 2017
Implementation of Adaptive Logic Networks on an FPGA board
JP Oliver, AF de Oliveira, JP Acle, J Roberto, RM Canetti
Configurable computing: technology and applications 3526, 264-273, 1998
Tools for design and evaluation of photovoltaic systems
G Casaravilla, R Chaer, J Oliver
III Congreso Internacional Energía, Ambiente e Innovación Tecnológica, 1995
Hardware implementation of a multi-channel eeg lossless compression algorithm
F Favaro, JP Oliver
2019 X Southern Conference on Programmable Logic (SPL), 69-73, 2019
Técnicas de bajo consumo en FPGAs
JP Oliver
UR. FING, 2014
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