sandeep jain
sandeep jain
Sr Fellow, Siemens EDA
Verified email at - Homepage
Cited by
Cited by
Scan tests tolerant to indeterminate states when employing signature analysis to analyze test outputs
S Jain, J Abraham
US Patent 7,404,126, 2008
System and method for debugging scan chains
S Jain, N Krishnamoorthy, A Chaudhary, N Mahajan, S Chauhan
US Patent 8,458,541, 2013
Sequential scan based techniques to test interface between modules designed to operate at different frequencies
NSS Puvvada, N Krishnamoorthy, S Jain, J Abraham
US Patent 7,421,634, 2008
Enhancements in deterministic BIST implementations for improving test of complex SOCs
S Jain, J Abraham, SK Vooka, S Kale, A Dutta, R Parekhji
20th International Conference on VLSI Design held jointly with 6th …, 2007
Self-provisioning and protection of a secret key
S Doll, R Soja, S Jain, P Singh, D Satsangi, V Sharma
US Patent App. 16/220,412, 2020
System and method for scan testing integrated circuits
S Jain, A Chaudhary, S Jeloka
US Patent App. 12/954,907, 2012
System and method of scan reset upon entering scan mode
S Jain, TE Tkacik, N Krishnamoorthy
US Patent 10,955,473, 2021
Fault attack protection against synchronized fault injections
S Doll, M Regner, S Jain
US Patent 10,305,479, 2019
System for facilitating secure communication in system-on-chips
S Jain, K Taylor, V Sharma, A Agarwal
US Patent 11,768,987, 2023
Method and system for securely patching read-only-memory code
A Dahiya, S Jain
US Patent 11,328,066, 2022
Side channel attack protection
S Doll, S Jain, V Sharma, D Satsangi, AV Giri, A Krishna, N Moudgil
US Patent 11,244,078, 2022
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