| A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI KI Seo, B Haran, D Gupta, D Guo, T Standaert, R Xie, H Shang, E Alptekin, ... 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014 | 108 | 2014 |
| Reflectivity-induced variation in implant layer lithography TC Bailey, G McIntyre, B Zhang, RP Deschner, S Mehta, W Song, HR Lee, ... Optical Microlithography XXI 6924, 1447-1457, 2008 | 19 | 2008 |
| Swing effects in alternating phase shift mask lithography: Implications of low illumination N Singh, HQ Sun, WH Foo, SS Mehta, R Kumar, AO Adeyeye, H Suda, ... Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2006 | 13 | 2006 |
| A FinFET and Tri-gate MOSFET's channel structure patterning and its influence on the device performance S Jagar, N Singh, SS Mehta, N Agrawal, G Samudra, N Balasubramanian Thin solid films 462, 1-5, 2004 | 13 | 2004 |
| Process improvement of 0.13 μm Cu/Low K (Black DiamondTM) dual damascene interconnection HY Li, YJ Su, CF Tsang, SM Sohan, V Bliznetsov, L Zhang Microelectronics Reliability 45 (7-8), 1134-1143, 2005 | 11 | 2005 |
| Investigating deprotection-induced shrinkage and retro-grade sidewalls in NTD resists TV Pistor, C Wang, Y Wang, L Yuan, J Kye, Y Wu, S Mehta, P Ackmann Optical Microlithography XXVIII 9426, 199-207, 2015 | 8 | 2015 |
| Critical dimension and pattern recognition structures for devices manufactured using double patterning techniques S Mehta, TQ Chen, V Chauhan, R Srivastava, C Labelle, M Kelling US Patent 8,932,961, 2015 | 7 | 2015 |
| Computational study of line tip printability of sub-20-nm technology L Yuan, T Wallow, D Civay, L Jang, J Kye, H Levinson, S Singh, M Kelling Extreme Ultraviolet (EUV) Lithography III 8322, 682-690, 2012 | 7 | 2012 |
| Effect of in-line electron beam treatment on the electrical performance of Cu/organic low-k damascene interconnects Z Chen, K Prasad, ZH Gan, SY Wu, SS Mehta, N Jiang, SG Mhaisalkar, ... IEEE electron device letters 26 (7), 448-450, 2005 | 7 | 2005 |
| Lithographic patterning to form fine pitch features SK Singh, SS Mehta, S Singh, RP Srivastava US Patent 10,504,774, 2019 | 6 | 2019 |
| Competitive and cost effective copper/low-k interconnect (BEOL) for 28 nm CMOS technologies R Augur, C Child, JH Ahn, TJ Tang, L Clevenger, D Kioussis, H Masuda, ... Microelectronic engineering 92, 42-44, 2012 | 5 | 2012 |
| Assessment of negative tone development challenges SS Mehta, Y Xu, G Landie, V Chauhan, SD Burns, P Lawson, B Hamieh, ... SPIE Advanced Lithography 8325 (Process Enhancements for Negative Tone D …, 2012 | 5 | 2012 |
| Copper contact metallization using ru-based barrier liners for 45 nm and beyond SC Seo, CC Yang, CK Hu, A Kerber, D Horak, K Petrillo, S Holmes, S Fan, ... AMC, 31-32, 2008 | 5 | 2008 |
| Methods and devices for back end of line via formation SK Singh, SS Mehta, RP Srivastava US Patent 9,691,654, 2017 | 4 | 2017 |
| Investigation of trench and contact hole shrink mechanism in the negative tone develop process SS Mehta, C Higgins, V Chauhan, S Pal, HP Koh, JR Fakhoury, S Gao, ... Advances in Resist Materials and Processing Technology XXX 8682, 172-180, 2013 | 4 | 2013 |
| Spot size mode converter for efficient coupling to SiN waveguides MT Doan, CF Tsang, BR Murthy, B Narayanan, CK Chang, SS Mehta, ... Photonics North 2004: Optical Components and Devices 5577, 221-228, 2004 | 4 | 2004 |
| Method for fabricating a semiconductor integrated circuit with a litho-etch, litho-etch process for etching trenches S Mehta, N Chen, Y Sun, M Herrick, S Pal, JS Kim US Patent 9,171,735, 2015 | 3 | 2015 |
| Process variation challenges and resolution in the negative-tone develop double patterning for 20nm and below technology node SS Mehta, LK Ganta, V Chauhan, Y Wu, S Singh, C Ann, L Subramany, ... Advances in Patterning Materials and Processes XXXII 9425, 89-99, 2015 | 3 | 2015 |
| Integration of an EUV metal layer: a 20/14nm demo C Higgins, E Verduijn, X Hu, L Wang, M Singh, J Wandell, S Mehta, ... Extreme Ultraviolet (EUV) Lithography V 9048, 449-457, 2014 | 3 | 2014 |
| Evaluation of lens heating effect in high transmission NTD processes at the 20nm technology node B Jeon, S Lee, L Subramany, C Li, S Pal, S Meyers, S Mehta, Y Wei, ... Metrology, Inspection, and Process Control for Microlithography XXVIII 9050 …, 2014 | 2 | 2014 |
