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Robert Giterman
Robert Giterman
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A low-voltage radiation-hardened 13T SRAM bitcell for ultralow power space applications
L Atias, A Teman, R Giterman, P Meinerzhagen, A Fish
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (8 …, 2016
552016
Single-supply 3T gain-cell for low-voltage low-power applications
R Giterman, A Teman, P Meinerzhagen, L Atias, A Burg, A Fish
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (1), 358-362, 2015
542015
Exploration of Sub-VT and Near-VT 2T Gain-Cell Memories for Ultra-Low Power Applications under Technology Scaling
P Meinerzhagen, A Teman, R Giterman, A Burg, A Fish
Journal of Low Power Electronics and Applications 3 (2), 54-72, 2013
502013
An 800-MHz Mixed-4T IFGC Embedded DRAM in 28-nm CMOS Bulk Process for Approximate Storage Applications
R Giterman, A Fish, N Geuli, E Mentovich, A Burg, A Teman
IEEE Journal of Solid-State Circuits 53 (7), 2136-2148, 2018
482018
A 4-transistor nMOS-only logic-compatible gain-cell embedded DRAM with over 1.6-ms retention time at 700 mV in 28-nm FD-SOI
R Giterman, A Fish, A Burg, A Teman
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (4), 1245-1256, 2017
482017
Gain-cell Embedded DRAMs for Low-power VLSI Systems-on-chip
P Meinerzhagen, A Teman, R Giterman, N Edri, A Burg, A Fish
Springer International Publishing, 2018
442018
Area and energy-efficient complementary dual-modular redundancy dynamic memory for space applications
R Giterman, L Atias, A Teman
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (2), 502-509, 2016
372016
Replica technique for adaptive refresh timing of gain-cell-embedded DRAM
A Teman, P Meinerzhagen, R Giterman, A Fish, A Burg
IEEE Transactions on Circuits and Systems II: Express Briefs 61 (4), 259-263, 2014
342014
Leakage power attack-resilient symmetrical 8T SRAM cell
R Giterman, M Vicentowski, I Levi, Y Weizman, O Keren, A Fish
IEEE Transactions on very large scale integration (VLSI) systems 26 (10 …, 2018
302018
Approximate computing with unreliable dynamic memories
S Ganapathy, A Teman, R Giterman, A Burg, G Karakonstantis
2015 IEEE 13th international new circuits and systems conference (NEWCAS), 1-4, 2015
302015
Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories
A Teman, G Karakonstantis, R Giterman, P Meinerzhagen, A Burg
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 489-494, 2015
302015
4T gain-cell with internal-feedback for ultra-low retention power at scaled CMOS nodes
R Giterman, A Teman, P Meinerzhagen, A Burg, A Fish
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2177-2180, 2014
272014
A 7T security oriented SRAM bitcell
R Giterman, O Keren, A Fish
IEEE Transactions on Circuits and Systems II: Express Briefs 66 (8), 1396-1400, 2018
232018
A 1-Mbit fully logic-compatible 3T gain-cell embedded DRAM in 16-nm FinFET
R Giterman, A Shalom, A Burg, A Fish, A Teman
IEEE Solid-State Circuits Letters 3, 110-113, 2020
142020
An 800 Mhz mixed-VT 4T gain-cell embedded DRAM in 28 nm CMOS bulk process for approximate computing applications
R Giterman, A Fish, N Geuli, E Mentovich, A Burg, A Teman
ESSCIRC 2017-43rd IEEE European Solid State Circuits Conference, 308-311, 2017
142017
Current-based data-retention-time characterization of gain-cell embedded DRAMs across the design and variations space
R Giterman, A Bonetti, EV Bravo, T Noy, A Teman, A Burg
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (4), 1207-1217, 2020
112020
Single-event upset tolerance study of a low-voltage 13T radiation-hardened SRAM bitcell
A Haran, E Keren, D David, N Refaeli, R Giterman, M Assaf, L Atias, ...
IEEE Transactions on Nuclear Science 67 (8), 1803-1812, 2020
102020
A 24 kb single-well mixed 3T gain-cell eDRAM with body-bias in 28 nm FD-SOI for refresh-free DSP applications
J Narinx, R Giterman, A Bonetti, N Frigerio, C Aprile, A Burg, Y Leblebici
2019 IEEE Asian Solid-State Circuits Conference (A-SSCC), 219-222, 2019
92019
GC-eDRAM with body-bias compensated readout and error detection in 28-nm FD-SOI
R Giterman, A Bonetti, A Burg, A Teman
IEEE Transactions on Circuits and Systems II: Express Briefs 66 (12), 2042-2046, 2019
92019
Hybrid GC-eDRAM/SRAM bitcell for robust low-power operation
R Giterman, A Teman, P Meinerzhagen
IEEE Transactions on Circuits and Systems II: Express Briefs 64 (12), 1362-1366, 2017
92017
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