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Warren A. Hunt, Jr
Warren A. Hunt, Jr
Professor of Computer Science, University of Texas
Email confirmado em cs.utexas.edu - Página inicial
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FM8501: A Verified Microprocessor, volume 795 of Lecture Notes in Artificial Intelligence
WA Hunt Jr
Springer-Verlag, Berlin, 1994
373*1994
An approach to systems verification
WR Bevier, WA Hunt, JS Moore, WD Young
Journal of Automated Reasoning 5 (4), 411-428, 1989
2181989
Microprocessor design verification
WA Hunt
Journal of Automated Reasoning 5 (4), 429-460, 1989
2081989
DRAT-trim: Efficient checking and trimming using expressive clausal proofs
N Wetzler, MJH Heule, WA Hunt Jr
International Conference on Theory and Applications of Satisfiability …, 2014
1962014
Processor verification with precise exceptions and speculative execution
J Sawada, W Hunt
Computer Aided Verification, 135-146, 1998
1401998
Trimming while checking clausal proofs
MJH Heule, WA Hunt, N Wetzler
Formal Methods in Computer-Aided Design (FMCAD), 2013, 181-188, 2013
1092013
The mechanical verification of a microprocessor design
WA Hunt
From HDL descriptions to guaranteed correct circuit designs, 89-129, 1987
1081987
A formal HDL and its use in the FM9001 verification
WA Hunt, BC Brock
Philosophical Transactions of the Royal Society of London A: Mathematical …, 1992
1011992
Trace table based approach for pipelined microprocessor verification
J Sawada, W Hunt
Computer Aided Verification, 364-375, 1997
911997
Efficient certified RAT verification
L Cruz-Filipe, MJH Heule, WA Hunt, M Kaufmann, P Schneider-Kamp
International Conference on Automated Deduction, 220-236, 2017
792017
Verifying refutations with extended resolution
MJH Heule, WA Hunt Jr, N Wetzler
International Conference on Automated Deduction, 345-359, 2013
762013
A flexible formal verification framework for industrial scale validation
A Slobodová, J Davis, S Swords, W Hunt
Formal Methods and Models for Codesign (MEMOCODE), 2011 9th IEEE/ACM …, 2011
562011
The DUAL-EVAL Hardware Description Language and Its Use in the Formal Specification and Verification of the FM9001 Microprocessor
WA Hunt Jr, BC Brock
Design Automation Conference, 1995. Proceedings of the ASP-DAC'95/CHDL'95 …, 0
56*
The DUAL-EVAL hardware description language and its use in the formal specification and verification of the FM9001 microprocessor
BC Brock, WA Hunt
Formal Methods in System Design 11 (1), 71-104, 1997
541997
Simulation and formal verification of x86 machine-code programs that make system calls
S Goel, WA Hunt, M Kaufmann, S Ghosh
2014 Formal Methods in Computer-Aided Design (FMCAD), 91-98, 2014
482014
Linear and nonlinear arithmetic in ACL2
W Hunt, R Krug, J Moore
Correct Hardware Design and Verification Methods, 319-333, 2003
452003
Industrial Hardware and Software Verification with ACL2
WA Hunt Jr, M Kaufmann, JS Moore, A Slobodova
Philosophical Transactions of the Royal Society (Article Number 20150399 …, 2017
442017
Report on the formal specification and partial verification of the VIPER microprocessor
B Brock, WA Hunt Jr
Computer Assurance, 1991. COMPASS'91, Systems Integrity, Software Safety and …, 1991
431991
Deductive verification of pipelined machines using first-order quantification
S Ray, WA Hunt Jr
International Conference on Computer Aided Verification, 31-43, 2004
422004
Verification of FM9801: An out-of-order microprocessor model with speculative execution, exceptions, and program-modifying capability
J Sawada, WA Hunt
Formal Methods in System Design 20 (2), 187-222, 2002
412002
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