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Shubhrata Gupta
Shubhrata Gupta
Department of Electrical Engineering, National Institute of Technology Raipur
Email confirmado em nitrr.ac.in
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Hybrid topology of symmetrical multilevel inverter using less number of devices
SP Gautam, L Kumar, S Gupta
IET Power electronics 8 (11), 2125-2135, 2015
1352015
A deep Residual U-Net convolutional neural network for automated lung segmentation in computed tomography images
A Khanna, ND Londhe, S Gupta, A Semwal
Biocybernetics and Biomedical Engineering 40 (3), 1314-1327, 2020
1322020
Reduction in number of devices for symmetrical and asymmetrical multilevel inverters
SP Gautam, LK Sahu, S Gupta
IET Power Electronics 9 (4), 698-709, 2016
1252016
A single-phase five-level inverter topology with switch fault-tolerance capabilities
SP Gautam, L Kumar, S Gupta, N Agrawal
IEEE Transactions on Industrial Electronics 64 (3), 2004-2014, 2016
1072016
Symmetrical and asymmetrical reduced device multilevel inverter topology
A Chappa, S Gupta, LK Sahu, SP Gautam, KK Gupta
IEEE Journal of Emerging and Selected Topics in Power Electronics 9 (1), 885-896, 2019
902019
Single‐phase multilevel inverter topologies with self‐voltage balancing capabilities
SP Gautam, L Kumar, S Gupta
IET Power Electronics 11 (5), 844-855, 2018
842018
Optimal coordination of directional overcurrent relays: A genetic algorithm approach
DK Singh, S Gupta
2012 IEEE Students' Conference on Electrical, Electronics and Computer …, 2012
792012
Development of fault‐tolerant MLI topology
M Jalhotra, L Kumar, SP Gautam, S Gupta
IET Power Electronics 11 (8), 1416-1424, 2018
492018
Reliability improvement of transistor clamped H‐bridge‐based cascaded multilevel inverter
SP Gautam, S Gupta, L Kumar
IET Power Electronics 10 (7), 770-781, 2017
472017
A fault-tolerant multilevel inverter topology with preserved output power and voltage levels under pre-and postfault operation
A Chappa, S Gupta, LK Sahu, KK Gupta
IEEE Transactions on Industrial Electronics 68 (7), 5756-5764, 2020
402020
Approach to synthesis of fault tolerant reduced device count multilevel inverters (FT RDC MLIs)
NK Dewangan, S Gupta, KK Gupta
IET Power Electronics 12 (3), 476-482, 2019
342019
Highly resilient fault-tolerant topology of single-phase multilevel inverter
M Jalhotra, LK Sahu, S Gupta, SP Gautam
IEEE Journal of Emerging and Selected Topics in Power Electronics 9 (2 …, 2019
332019
Resilient multilevel inverter topology with improved reliability
A Chappa, S Gupta, LK Sahu, KK Gupta
IET Power Electronics 13 (15), 3384-3395, 2020
232020
Fault-tolerant asymmetrical multilevel inverter with preserved output power under post-fault operation
A Chappa, S Gupta, LK Sahu, KK Gupta, H Vahedi
IEEE Transactions on Industrial Electronics 69 (7), 6764-6773, 2021
212021
Reactive Power Control Using FC-TCR
S Gupta
International journal of innovative technology and research 1 (1), 37-41, 2013
182013
Intrinsic time decomposition based fault location scheme for unified power flow controller compensated transmission line
S Mishra, S Gupta, A Yadav
International Transactions on Electrical Energy Systems 30 (11), e12585, 2020
172020
Dense traffic flow patterns mining in bi-directional road networks using density based trajectory clustering
V Mirge, K Verma, S Gupta
Advances in Data Analysis and Classification 11, 547-561, 2017
172017
Hybrid WPT‐BDCT transform for high‐quality image compression
VS Thakur, S Gupta, K Thakur
IET Image Processing 11 (10), 899-909, 2017
162017
A novel two-terminal fault location approach utilizing traveling-waves for series compensated line connected to wind farms
S Mishra, S Gupta, A Yadav
Electric Power Systems Research 198, 107362, 2021
152021
UPFC facts devices in power system to improve the voltage profile and enhancement of power transfer loadability
M Singh, S Gupta
2016 IEEE 1st International Conference on Power Electronics, Intelligent …, 2016
152016
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Artigos 1–20