| Proving transaction and system-level properties of untimed SystemC TLM designs D Große, HM Le, R Drechsler Eighth ACM/IEEE International Conference on Formal Methods and Models for …, 2010 | 111 | 2010 |
| Extensible and configurable RISC-V based virtual prototype V Herdt, D Große, HM Le, R Drechsler 2018 Forum on Specification & Design Languages (FDL), 5-16, 2018 | 80 | 2018 |
| Safety evaluation of automotive electronics using virtual prototypes: State of the art and research challenges JH Oetjens, N Bannow, M Becker, O Bringmann, A Burger, M Chaari, ... Proceedings of the 51st annual design automation conference, 1-6, 2014 | 75 | 2014 |
| Verifying SystemC using an intermediate verification language and symbolic simulation HM Le, D Große, V Herdt, R Drechsler Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013 | 68 | 2013 |
| Quantified synthesis of reversible logic R Wille, HM Le, GW Dueck, D Große Proceedings of the conference on Design, automation and test in Europe, 1015 …, 2008 | 67 | 2008 |
| CRAVE: An advanced constrained random verification environment for SystemC F Haedicke, HM Le, D Große, R Drechsler 2012 International Symposium on System on Chip (SoC), 1-7, 2012 | 54 | 2012 |
| Verifying Instruction Set Simulators using Coverage-guided Fuzzing* V Herdt, D Große, HM Le, R Drechsler 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 360-365, 2019 | 45 | 2019 |
| Verifying SystemC using intermediate verification language and stateful symbolic simulation V Herdt, HM Le, D Große, R Drechsler IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 45 | 2018 |
| Automatic TLM fault localization for SystemC HM Le, D Große, R Drechsler IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 45 | 2012 |
| The system verification methodology for advanced TLM verification MFS Oliveira, C Kuznik, HM Le, D Große, F Haedicke, W Mueller, ... Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware …, 2012 | 40 | 2012 |
| Compiled symbolic simulation for SystemC V Herdt, HM Le, D Große, R Drechsler 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 37 | 2016 |
| Early SoC security validation by VP-based static information flow analysis M Hassan, V Herdt, HM Le, D Große, R Drechsler 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 400-407, 2017 | 35 | 2017 |
| Completeness-driven development R Drechsler, M Diepenbeck, D Große, U Kühne, HM Le, J Seiter, ... International Conference on Graph Transformation, 38-50, 2012 | 31 | 2012 |
| Early concolic testing of embedded binaries with virtual prototypes: A RISC-V case study V Herdt, D Große, HM Le, R Drechsler Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 30 | 2019 |
| Towards early validation of firmware-based power management using virtual prototypes: A constrained random approach V Herdt, HM Le, D Große, R Drechsler 2017 Forum on Specification and Design Languages (FDL), 1-8, 2017 | 24 | 2017 |
| Towards formal verification of real-world SystemC TLM peripheral models-a case study HM Le, V Herdt, D Große, R Drechsler 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016 | 22 | 2016 |
| Verifying SystemC using stateful symbolic simulation V Herdt, HM Le, R Drechsler Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 21 | 2015 |
| On the application of formal fault localization to automated RTL-to-TLM fault correspondence analysis for fast and accurate VP-based error effect simulation-a case study V Herdt, HM Le, D Grobe, R Drechsler 2016 Forum on Specification and Design Languages (FDL), 1-8, 2016 | 20 | 2016 |
| Detection of hardware trojans in SystemC HLS designs via coverage-guided fuzzing HM Le, D Große, N Bruns, R Drechsler 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 602-605, 2019 | 19 | 2019 |
| Towards analyzing functional coverage in SystemC TLM property checking HM Le, D Große, R Drechsler 2010 IEEE International High Level Design Validation and Test Workshop …, 2010 | 19 | 2010 |
