Sergey Tverdyshev
Sergey Tverdyshev
Verified email at huawei.com
Title
Cited by
Cited by
Year
Proving memory separation in a microkernel by code level verification
C Baumann, T Bormer, H Blasum, S Tverdyshev
2011 14th IEEE International Symposium on Object/Component/Service-Oriented …, 2011
582011
Formal verification of gate-level computer systems
S Tverdyshev, A Shadrin
LFM 8, 56-58, 2008
312008
Formal device and programming model for a serial interface
E Alkassar, M Hillebrand, S Knapp, R Rusev, S Tverdyshev
Proceedings, 4th International Verification Workshop (VERIFY), Bremen …, 2007
272007
Formal API specification of the PikeOS separation kernel
F Verbeek, O Havle, J Schmaltz, S Tverdyshev, H Blasum, B Langenstein, ...
NASA formal methods symposium, 375-389, 2015
252015
MILS-related information flow control in the avionic domain: A view on security-enhancing software architectures
K Müller, M Paulitsch, S Tverdyshev, H Blasum
IEEE/IFIP International Conference on Dependable Systems and Networks …, 2012
202012
Combination of Isabelle/HOL with automatic tools
S Tverdyshev
International Workshop on Frontiers of Combining Systems, 302-309, 2005
172005
Towards the formal verification of a distributed real-time automotive system
E Endres, C Müller, A Shadrin, S Tverdyshev
Proceedings of the Second NASA Formal Methods Symposium, 2010
132010
Invariants, modularity, and rights
E Cohen, E Alkassar, V Boyarinov, M Dahlweid, U Degenbaev, ...
International Andrei Ershov Memorial Conference on Perspectives of System …, 2009
132009
Formal specification of a generic separation kernel
F Verbeek, S Tverdyshev, O Havle, H Blasum, B Langenstein, W Stephan, ...
Archive of Formal Proofs, 2014
112014
Extending the gwv security policy and its modular application to a separation kernel
S Tverdyshev
NASA Formal Methods Symposium, 391-405, 2011
112011
Efficient bit-level model reductions for automated hardware verification
S Tverdyshev, E Alkassar
2008 15th International Symposium on Temporal Representation and Reasoning …, 2008
112008
Security requirements engineering in safety-critical railway signalling networks
M Heinrich, T Vateva-Gurova, T Arul, S Katzenbeisser, N Suri, H Birkholz, ...
Security and Communication Networks 2019, 2019
102019
A verified platform for a gate-level electronic control unit
S Tverdyshev
2009 Formal Methods in Computer-Aided Design, 164-171, 2009
82009
Security by Design: Introduction to MILS.
S Tverdyshev
MILS, 2017
72017
Towards power-efficient mixed-critical systems
F Broekaert, A Fritsch, L Sa, S Tverdyshev
Proc. of OSPERT, 30-35, 2013
62013
Mils-based information flow control in the avionic domain: A case study on compositional architecture and verification
K Müller, M Paulitsch, R Schwarz, S Tverdyshev, H Blasum
2012 IEEE/AIAA 31st Digital Avionics Systems Conference (DASC), 7B1-1-7B1-13, 2012
62012
Formal verification of gate-level computer systems
M Hillebrand, S Tverdyshev
International Computer Science Symposium in Russia, 322-333, 2009
62009
Two Architecture Approaches for MILS Systems in Mobility Domains (Automobile, Railway and Avionik).
D Adam, S Tverdyshev, C Rolfes, T Sandmann, S Baehr, O Sander, ...
MILS@ HiPEAC, 2015
52015
System calls instrumentation for intrusion detection in embedded mixed-criticality systems
M Kadar, S Tverdyshev, G Fohler
4th International Workshop on Security and Dependability of Critical …, 2019
42019
Towards Transparent Control-Flow Integrity in Safety-Critical Systems
D Kuzhiyelil, P Zieris, M Kadar, S Tverdyshev, G Fohler
International Conference on Information Security, 290-311, 2020
22020
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Articles 1–20