Ali Azarian
Ali Azarian
Synopsys, Inc. / Faculty of Engineering, University of Porto (FEUP)
Email confirmado em synopsys.com - Página inicial
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Reconfigurable computing architecture survey and introduction
A Azarian, M Ahmadi
2009 2nd IEEE International Conference on Computer Science and Information …, 2009
252009
An FPGA-based multi-core approach for pipelining computing stages
A Azarian, JMP Cardoso, S Werner, J Becker
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 1533-1540, 2013
52013
Analysis of error detection schemes: Toolchain support and hardware/software implications
A Azarian, JC Ferreira, S Werner, Z Petrov, JMP Cardoso, M Huebner
2012 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 62-69, 2012
42012
Reconfigurable computing architecture
A Azarian, M Ahmadi
Proc. IEEE-ICCSIT, 389-394, 2009
42009
Coarse/Fine-grained Approaches for Pipelining Computing Stages in FPGA-Based Multicore Architectures
A Azarian, JMP Cardoso
Euro-Par 2014: Parallel Processing Workshops - Euro-Par 2014 International …, 2014
32014
Pipelining Data-Dependent Tasks in FPGA-based Multicore Architectures
A Azarian, JMP Cardoso
Microprocessors and Microsystems, 2016
22016
Task-Level Pipelining in Configurable Multicore Architectures
A Azarian
PQDT-Global, 2016
2016
Reducing misses to external memory accesses in task-level pipelining
A Azarian, JMP Cardoso
2015 IEEE International Symposium on Circuits and Systems (ISCAS), 1422-1425, 2015
2015
An FPGA-based Fine-grained Data Synchronization for Pipelining Computing Stages
A Azarian, JMP Cardoso
X Jornadas sobre Sistemas Reconfiguráveis, 57-60, 2014
2014
Pipelining computing stages in configurable multicore architectures
A Azarian
2013 23rd International Conference on Field programmable Logic and …, 2013
2013
FPGA-based High-Level Design Strategies to Accelerate a 3D Path Planning Algorithm
JP Cardoso, J Teixeira, A Azarian, JC Alves
2012
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