Rui Policarpo Duarte
Rui Policarpo Duarte
INESC-ID, IST, Universidade de Lisboa
Verified email at ist.utl.pt - Homepage
Title
Cited by
Cited by
Year
Double-precision gauss-jordan algorithm with partial pivoting on fpgas
R Duarte, H Neto, M Véstias
2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009
242009
CardioWheel: ECG biometrics on the steering wheel
A Lourenço, AP Alves, C Carreiras, RP Duarte, A Fred
Joint European conference on machine learning and knowledge discovery in …, 2015
212015
Parallel dot-products for deep learning on FPGA
M Véstias, RP Duarte, JT de Sousa, H Neto
2017 27th International Conference on Field Programmable Logic and …, 2017
172017
Lite-CNN: a high-performance architecture to execute CNNs in low density FPGAs
M Véstias, RP Duarte, JT de Sousa, H Neto
2018 28th International Conference on Field Programmable Logic and …, 2018
132018
Synthesis of Bayesian Machines On FPGAs Using Stochastic Arithmetic
RP Duarte, J Lobo, JF Ferreira, J Dias
2nd International Workshop on Neuromorphic and Brain-Based Computing Systems …, 2015
132015
High-level linear projection circuit design optimization framework for FPGAs under over-clocking
RP Duarte, CS Bouganis
22nd International Conference on Field Programmable Logic and Applications …, 2012
92012
A fast and scalable architecture to run convolutional neural networks in low density FPGAs
MP Véstias, RP Duarte, JT de Sousa, HC Neto
Microprocessors and Microsystems 77, 103136, 2020
82020
Enhancing stochastic computations via process variation
RP Duarte, M Véstias, H Neto
2015 25th International Conference on Field Programmable Logic and …, 2015
82015
Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs
RP Duarte, CS Bouganis
2014 International Conference on ReConFigurable Computing and FPGAs …, 2014
82014
A unified framework for over-clocking linear projections on FPGAs under PVT variation
RP Duarte, CS Bouganis
International Symposium on Applied Reconfigurable Computing, 49-60, 2014
82014
Moving deep learning to the edge
MP Véstias, RP Duarte, JT de Sousa, HC Neto
Algorithms 13 (5), 125, 2020
62020
Fast convolutional neural networks in low density FPGAs using zero-skipping and weight pruning
MP Véstias, RP Duarte, JT de Sousa, HC Neto
Electronics 8 (11), 1321, 2019
62019
Xtokaxtikox: A stochastic computing-based autonomous cyber-physical system
RP Duarte, H Neto, M Véstias
2016 IEEE International Conference on Rebooting Computing (ICRC), 1-7, 2016
52016
Arc 2014 over-clocking KLT designs on FPGAs under process, voltage, and temperature variation
RP Duarte, CS Bouganis
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 9 (1), 1-17, 2015
52015
Hybrid dot-product calculation for convolutional neural networks in FPGA
MP Véstias, RP Duarte, JT de Sousa, H Neto
2019 29th International Conference on Field Programmable Logic and …, 2019
42019
Fault-tolerant architecture for on-board dual-core synthetic-aperture radar imaging
H Cruz, RP Duarte, H Neto
International Symposium on Applied Reconfigurable Computing, 3-16, 2019
42019
kNN-STUFF: kNN STreaming Unit for Fpgas
J Vieira, RP Duarte, HC Neto
IEEE-Access, 2019
42019
On the computation of approximation coefficients in rom-based redundancy for seu mitigation on fpgas
RP Duarte, M Véstias, H Neto
RFPL, 1st Reliable Field Programmable Logic Workshop, FPL, 1-3, 2017
42017
A comparative study on transformer and inductor based LC tanks for VCOs
R Duarte, JR Fernandes
2009 MIXDES-16th International Conference Mixed Design of Integrated …, 2009
42009
FPGA-based OpenCL accelerator for discovering temporal patterns in gene expression data using biclustering
RP Duarte, Á Simões, R Henriques, HC Neto
Proceedings of the 6th International Workshop on Parallelism in …, 2018
32018
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