Wayne Luk
Wayne Luk
Professor of Computer Engineering, Imperial College London
Email confirmado em imperial.ac.uk
TítuloCitado porAno
Reconfigurable computing: architectures and design methods
TJ Todman, GA Constantinides, SJE Wilton, O Mencer, W Luk, ...
IEE Proceedings-Computers and Digital Techniques 152 (2), 193-207, 2005
5032005
Reconfigurable computing: architectures and design methods
TJ Todman, GA Constantinides, SJE Wilton, O Mencer, W Luk, ...
IEE Proceedings-Computers and Digital Techniques 152 (2), 193-207, 2005
5032005
Compiling Occam into field-programmable gate arrays
I Page, W Luk
FPGAs, Oxford Workshop on Field Programmable Logic and Applications 15, 271-283, 1991
2681991
Accuracy-guaranteed bit-width optimization
DU Lee, AA Gaffar, RCC Cheung, O Mencer, W Luk, GA Constantinides
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
2302006
Pipeline vectorization
M Weinhardt, W Luk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2001
2222001
Gaussian random number generators
DB Thomas, W Luk, PHW Leong, JD Villasenor
ACM Computing Surveys (CSUR) 39 (4), 11, 2007
2182007
A comparison of CPUs, GPUs, FPGAs, and massively parallel processor arrays for random number generation
DB Thomas, L Howes, W Luk
Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2009
1972009
Comparing three heuristic search methods for functional partitioning in hardware–software codesign
T Wiangtong, PYK Cheung, W Luk
Design Automation for Embedded Systems 6 (4), 425-449, 2002
1902002
Axel: a heterogeneous cluster with FPGAs and GPUs
KH Tsoi, W Luk
Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010
1842010
Wordlength optimization for linear digital signal processing
GA Constantinides, PYK Cheung, W Luk
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
1762003
A hardware Gaussian noise generator using the Box-Muller method and its error analysis
DU Lee, JD Villasenor, W Luk, PHW Leong
IEEE Transactions on Computers 55 (6), 659-671, 2006
1712006
Pipeline vectorization for reconfigurable systems
M Weinhardt, W Luk
Seventh Annual IEEE Symposium on Field-Programmable Custom Computing …, 1999
1621999
Compilation tools for run-time reconfigurable designs
W Luk, N Shirazi, PYK Cheung
Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom …, 1997
1611997
Unifying bit-width optimisation for fixed-point and floating-point designs
AA Gaffar, O Mencer, W Luk
12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2004
1342004
Floating-point bitwidth analysis via automatic differentiation
AA Gaffar, O Mencer, W Luk, PYK Cheung, N Shirazi
2002 IEEE International Conference on Field-Programmable Technology, 2002 …, 2002
1332002
Performance comparison of graphics processors to reconfigurable logic: A case study
B Cope, PYK Cheung, W Luk, L Howes
IEEE Transactions on computers 59 (4), 433-448, 2010
1322010
Maximum performance computing with dataflow engines
O Pell, O Mencer, KH Tsoi, W Luk
High-performance computing using FPGAs, 747-774, 2013
1312013
Enhancing relocatability of partial bitstreams for run-time reconfiguration
T Becker, W Luk, PYK Cheung
15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2007
1272007
The impact of pipelining on energy per operation in field-programmable gate arrays
SJE Wilton, SS Ang, W Luk
International Conference on Field Programmable Logic and Applications, 719-728, 2004
1262004
Memory access optimisation for reconfigurable systems
M Weinhardt, W Luk
IEE Proceedings-Computers and Digital Techniques 148 (3), 105-112, 2001
1232001
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