Erik H. D'Hollander
Erik H. D'Hollander
Professor of Computer Science, Ghent University
Verified email at elis.ugent.be
Title
Cited by
Cited by
Year
Reuse distance as a metric for cache behavior
K Beyls, E D’Hollander
Proceedings of the IASTED Conference on Parallel and Distributed Computing …, 2001
2312001
Generating cache hints for improved program efficiency
K Beyls, EH D’Hollander
Journal of Systems Architecture 51 (4), 223-250, 2005
1042005
Partitioning and labeling of loops by unimodular transformations
EH D'Hollander
IEEE Transactions on parallel and distributed systems 3 (4), 465-476, 1992
931992
Using hammock graphs to structure programs
F Zhang, EH D'Hollander
IEEE Transactions on Software Engineering 30 (4), 231-245, 2004
742004
Discovery of locality-improving refactorings by reuse path analysis
K Beyls, EH D’Hollander
International Conference on High Performance Computing and Communications …, 2006
722006
Reuse distance-based cache hint selection
K Beyls, EH D’Hollander
European Conference on Parallel Processing, 265-275, 2002
692002
Estimation of the pore size distribution from the moisture characteristic
EH d'Hollander
Water Resources Research 15 (1), 107-112, 1979
671979
Refactoring for data locality
K Beyls, EH D'Hollander
Computer 42 (2), 62-71, 2009
662009
Software methods to improve data locality and cache behavior
K Beyls
Ghent University, 2004
422004
Parallel graph generation algorithms for shared and distributed memory machines
SC Allmaier, S Dalibor, D Kreische
Advances in Parallel Computing 12, 581-588, 1998
411998
Partitioning and labeling of index sets in do loops with constant dependence vectors
E D'HOLLANDER
1989 International Conference on Parallel Processing, University Park, PA, 1989
411989
Finding and applying loop transformations for generating optimized FPGA implementations
H Devos, K Beyls, M Christiaens, J Van Campenhout, EH D’Hollander, ...
Transactions on High-Performance Embedded Architectures and Compilers I, 159-178, 2007
402007
Performance modeling for FPGAs: extending the roofline model with high-level synthesis tools
B Da Silva, A Braeken, EH D’Hollander, A Touhafi
International Journal of Reconfigurable Computing 2013, 2013
372013
Visualizing the impact of the cache on program execution
Y Yu, K Beyls, EH D'Hollander
Proceedings Fifth International Conference on Information Visualisation, 336-341, 2001
372001
Spike recognition and on-line classification by unsupervised learning system
EH D'Hollander, GA Orban
IEEE Transactions on Biomedical Engineering, 279-284, 1979
371979
Loop parallelization using the 3D iteration space visualizer
Y Yu, EH D'HOLLANDER
Journal of Visual Languages & Computing 12 (2), 163-181, 2001
282001
Software refactoring guided by multiple soft-goals
Y Yu, J Mylopoulos, J Leite, L Liu, EH D'Hollander
252003
Intermediately executed code is the key to find refactorings that improve temporal data locality
K Beyls, EH D'Hollander
Proceedings of the 3rd conference on Computing frontiers, 373-382, 2006
232006
Compile-time cache hint generation for EPIC architectures
K Beyls, E D’Hollander
2nd Workshop on Explicitly Parallel Instruction Computing Architecture and …, 2002
232002
Comparing and combining GPU and FPGA accelerators in an image processing context
B da Silva, A Braeken, EH D'Hollander, A Touhafi, JG Cornelis, J Lemeire
2013 23rd International Conference on Field programmable Logic and …, 2013
222013
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