| Analog circuits optimization based on evolutionary computation techniques M Barros, J Guilherme, N Horta Integration 43 (1), 136-155, 2010 | 150 | 2010 |
| Analog circuits and systems optimization based on evolutionary computation techniques MFM Barros, JMC Guilherme, NCG Horta Springer, 2010 | 132 | 2010 |
| A 2.5 mw 80 db dr 36 db sndr 22 ms/s logarithmic pipeline adc J Lee, J Kang, S Park, J Seo, J Anders, J Guilherme, MP Flynn IEEE Journal Of Solid-State Circuits 44 (10), 2755-2765, 2009 | 71 | 2009 |
| AIDA: Automated analog IC design flow from circuit level to layout R Martins, N Lourenço, S Rodrigues, J Guilherme, N Horta 2012 International Conference on Synthesis, Modeling, Analysis and …, 2012 | 51 | 2012 |
| Reconfigurable multi-mode sigma–delta modulator for 4G mobile terminals A Silva, J Guilherme, N Horta Integration 42 (1), 34-46, 2009 | 45 | 2009 |
| Laygen-automatic layout generation of analog ics from hierarchical template descriptions N Lourenço, M Vianello, J Guilherme, N Horta 2006 Ph. D. Research in Microelectronics and Electronics, 213-216, 2006 | 44 | 2006 |
| A survey on nonlinear analog-to-digital converters M Santos, N Horta, J Guilherme Integration 47 (1), 12-22, 2014 | 35 | 2014 |
| FUZYE: A Fuzzy -Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms A Canelas, R Póvoa, R Martins, N Lourenço, J Guilherme, JP Carvalho, ... IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 33 | 2018 |
| GA-SVM feasibility model and optimization kernel applied to analog IC design automation M Barros, J Guilherme, N Horta Proceedings of the 17th ACM Great Lakes symposium on VLSI, 469-472, 2007 | 33 | 2007 |
| New CMOS logarithmic A/D converters employing pipeline and algorithmic architectures J Guilherme, JE Franca Proceedings of ISCAS'95-International Symposium on Circuits and Systems 1 …, 1995 | 29 | 1995 |
| A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction J Guilherme, J Vital, J Franca ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and …, 2001 | 17 | 2001 |
| Switch mode power supply design constraints for space applications M Santos, H Ribeiro, M Martins, J Guilherme Proceedings of the 6th Conference on Telecommunications, ConfTele, 2007 | 14 | 2007 |
| GA-SVM optimization kernel applied to analog IC design automation M Barros, J Guilherme, N Horta 2006 13th IEEE International Conference on Electronics, Circuits and Systems …, 2006 | 14 | 2006 |
| A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications J Guilherme, P Figueiredo, P Azevedo, G Minderico, A Leal, J Vital, ... ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 13 | 2001 |
| New logarithmic two-step flash A/D converter with digital error correction for MOS technology J Guilherme, J Vital, JE Franca 38th Midwest Symposium on Circuits and Systems. Proceedings 2, 881-884, 1995 | 13 | 1995 |
| Designing reconfigurable multi-standard analog baseband front end for 4G mobile terminals: System level design A Silva, J Guilherme, RF Neves, N Horta 6th Conference on Telecommunications, 2007 | 12 | 2007 |
| An evolutionary optimization kernel with adaptive parameters applied to analog circuit design M Barros, G Neves, J Guilherme, N Horta International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005 …, 2005 | 12 | 2005 |
| Overview of radiation effects and design constraints off fully custom SMPS M Santos, C Pires, J Guilherme, N Horta APCCAS 2008-2008 IEEE Asia Pacific Conference on Circuits and Systems, 372-375, 2008 | 11 | 2008 |
| Symbolic synthesis of non-linear data converters J Guilherme, NC Horta, JE Franca 1998 IEEE International Conference on Electronics, Circuits and Systems …, 1998 | 11 | 1998 |
| 11.7 b Time-To-Digital Converter with 0.82 ps resolution in 130nm CMOS Technology R Granja, M Santos, J Guilherme, N Horta 2018 14th Conference on Ph. D. Research in Microelectronics and Electronics …, 2018 | 9 | 2018 |
